Patents by Inventor Hiroyasu NOTO
Hiroyasu NOTO has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Patent number: 11363719Abstract: A wiring substrate includes a core substrate, and a build-up part laminated on the substrate and including resin insulating layers. The insulating layers include a first insulating layer, the build-up part includes a conductor layer on the first insulating layer, a second insulating layer on the first insulating layer and covering the conductor layer, and a recess penetrating through the second insulating layer and exposing portion of the conductor layer such that the conductor layer includes component mounting region that places an electronic component in the recess and a conductor pad forming bottom surface of the recess, the insulating layers include inorganic filler such that all insulating layers or all insulating layers other than the first insulating layer include the inorganic filler and that inorganic filler content rate of the first insulating layer is lower than inorganic filler content rate of the insulating layers other than the first insulating layer.Type: GrantFiled: February 25, 2021Date of Patent: June 14, 2022Assignee: IBIDEN CO., LTD.Inventors: Hiroyasu Noto, Kentaro Wada
-
Publication number: 20210282266Abstract: A wiring substrate includes a core substrate, and a build-up part laminated on the substrate and including resin insulating layers. The insulating layers include a first insulating layer, the build-up part includes a conductor layer on the first insulating layer, a second insulating layer on the first insulating layer and covering the conductor layer, and a recess penetrating through the second insulating layer and exposing portion of the conductor layer such that the conductor layer includes component mounting region that places an electronic component in the recess and a conductor pad forming bottom surface of the recess, the insulating layers include inorganic filler such that all insulating layers or all insulating layers other than the first insulating layer include the inorganic filler and that inorganic filler content rate of the first insulating layer is lower than inorganic filler content rate of the insulating layers other than the first insulating layer.Type: ApplicationFiled: February 25, 2021Publication date: September 9, 2021Applicant: IBIDEN CO., LTD.Inventors: Hiroyasu NOTO, Kentaro WADA
-
Patent number: 10271426Abstract: A printed wiring board includes a first conductor layer including a first conductor circuit and a second conductor circuit formed adjacent to the first conductor circuit, a resin insulating layer formed on the first conductor layer such that the insulating layer is filling space between the first and second conductor circuits, and a second conductor layer formed on the insulating layer such that the insulating layer is interposed between the first and second conductor layers. The first conductor layer has thickness in the range of 1 ?m to 15 ?m and is formed such that the space between the first and second conductor circuits has width in the range of 2 ?m to 7 ?m, and the insulating layer includes inorganic particles having average particle diameter in the range of 0.05 ?m to 1.0 ?m and content in the range of 35 wt. % to 75 wt. % in the insulating layer.Type: GrantFiled: September 14, 2017Date of Patent: April 23, 2019Assignee: IBIDEN CO., LTD.Inventors: Hiroyasu Noto, Yoshinori Takenaka
-
Patent number: 10271427Abstract: A printed wiring board includes a first conductor layer including a first conductor circuit and a second conductor circuit formed adjacent to the first circuit, a resin insulating layer formed on the first conductor layer such that the insulating layer is filling space between the first and second conductor circuits, and a second conductor layer formed on the insulating layer such that distance (T) between the first and second conductor layers is in the range of 4.5 ?m to 10.5 ?m. The resin insulating layer includes inorganic particles having average particle diameter (D1) such that ratio (D1/S) of the diameter (D1) to distance (S) of the space is less than 0.25 and that ratio (D1/T) of the diameter (D1) to the distance (T) is less than 0.25, where the distance (S) of the space between the first and second conductor circuits is in the range of 4.5 ?m to 10.5.Type: GrantFiled: September 14, 2017Date of Patent: April 23, 2019Assignee: IBIDEN CO., LTD.Inventors: Hiroyasu Noto, Yoshinori Takenaka
-
Patent number: 10070511Abstract: A wiring board includes an insulating resin layer including resin material and filler, and a conductive circuit layer laminated on a surface of the insulating resin layer and having wiring patterns. The filler has particle diameters of 15% or less of a minimum width of the wiring patterns when the particle diameters of the filler is measured in a unit range defined such that the unit range has a width and a length where the length is measured from the surface of the insulating resin layer and is selected from a smaller of twice the minimum width of the wiring patterns and a plate thickness of the insulating resin layer, and the width is twice the minimum width of the wiring patterns.Type: GrantFiled: August 22, 2017Date of Patent: September 4, 2018Assignee: IBIDEN CO., LTD.Inventors: Yoshinori Takenaka, Hiroyasu Noto
-
Publication number: 20180213644Abstract: A printed wiring board includes an interlayer resin insulating layer including resin and inorganic particles, a via conductor formed through the insulating layer, a first conductor layer formed on the first surface of the insulating layer and including a land portion of the via conductor on the first surface, and a second conductor layer formed on second surface of the insulating layer and connected to bottom of the via conductor. The bottom of the via conductor has diameter of 20 to 35 ?m, the first conductor layer has thickness of 3 to 12 ?m, the insulating layer has thickness of 1 to 15 ?m, the second conductor layer has thickness of 1 to 12 ?m, and the second conductor and insulating layers are formed such that T1/T2 is 0.06 to 7.00 where T1 represents the thickness of the second conductor layer, and T2 represents the thickness of the insulating layer.Type: ApplicationFiled: January 26, 2018Publication date: July 26, 2018Applicant: IBIDEN CO., LTD.Inventors: Hiroyasu Noto, Yoshinori Takenaka
-
Publication number: 20180084641Abstract: A printed wiring board includes a first conductor layer including a first conductor circuit and a second conductor circuit formed adjacent to the first circuit, a resin insulating layer formed on the first conductor layer such that the insulating layer is filling space between the first and second conductor circuits, and a second conductor layer formed on the insulating layer such that distance (T) between the first and second conductor layers is in the range of 4.5 ?m to 10.5 ?m. The resin insulating layer includes inorganic particles having average particle diameter (D1) such that ratio (D1/S) of the diameter (D1) to distance (S) of the space is less than 0.25 and that ratio (D1/T) of the diameter (D1) to the distance (T) is less than 0.25, where the distance (S) of the space between the first and second conductor circuits is in the range of 4.5 ?m to 10.5.Type: ApplicationFiled: September 14, 2017Publication date: March 22, 2018Applicant: IBIDEN CO., LTD.Inventors: Hiroyasu NOTO, Yoshinori TAKENAKA
-
Publication number: 20180084640Abstract: A printed wiring board includes a first conductor layer including a first conductor circuit and a second conductor circuit formed adjacent to the first conductor circuit, a resin insulating layer formed on the first conductor layer such that the insulating layer is filling space between the first and second conductor circuits, and a second conductor layer formed on the insulating layer such that the insulating layer is interposed between the first and second conductor layers. The first conductor layer has thickness in the range of 1 ?m to 15 ?m and is formed such that the space between the first and second conductor circuits has width in the range of 2 ?m to 7 ?m, and the insulating layer includes inorganic particles having average particle diameter in the range of 0.05 ?m to 1.0 ?m and content in the range of 35 wt. % to 75 wt. % in the insulating layer.Type: ApplicationFiled: September 14, 2017Publication date: March 22, 2018Applicant: IBIDEN CO., LTD.Inventors: Hiroyasu NOTO, Yoshinori TAKENAKA
-
Publication number: 20180054885Abstract: A wiring board includes an insulating resin layer including resin material and filler, and a conductive circuit layer laminated on a surface of the insulating resin layer and having wiring patterns. The filler has particle diameters of 15% or less of a minimum width of the wiring patterns when the particle diameters of the filler is measured in a unit range defined such that the unit range has a width and a length where the length is measured from the surface of the insulating resin layer and is selected from a smaller of twice the minimum width of the wiring patterns and a plate thickness of the insulating resin layer, and the width is twice the minimum width of the wiring patterns.Type: ApplicationFiled: August 22, 2017Publication date: February 22, 2018Applicant: IBIDEN CO., LTD.Inventors: Yoshinori TAKENAKA, Hiroyasu NOTO