Patents by Inventor Hiroyasu Yanase

Hiroyasu Yanase has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20090001868
    Abstract: An image display device comprising a back-surface substrate (1) having a plurality of first electrodes (8), an insulating film (14), a plurality of second electrodes (9), and an electron source (10); a front-surface substrate (2) having a fluorescent layer (15), and further having an anode for the application of an acceleration voltage; a frame (3) disposed between the front-surface substrate (2) and the back-surface substrate (1); and a sealing member (5) for sealing the frame (3) and the two substrates in an airtight manner in a sealed area (52). The second electrodes (9) cover the insulating film (14) disposed beneath these second electrodes (9) in at least the sealed area (52), and place the sealing member (5) and the insulating film (14) in a non-contact state.
    Type: Application
    Filed: May 20, 2008
    Publication date: January 1, 2009
    Inventors: Tomoki Nakamura, Hiroyasu Yanase, Toshiaki Kusunoki, Etsuko Nishimura
  • Publication number: 20080303406
    Abstract: The present invention provides an image display device which can lower the resistance of scanning signal lines, can ensure the enhancement of reliability of supply of electricity and conductivity and the reliability of separation of elements, can exhibit excellent display characteristic, and can possess an extremely prolonged lifetime. The scanning signal line has the stacked film structure constituted of a lower layer film formed of an aluminum film and an upper layer film formed of an aluminum alloy film containing aluminum as a main component.
    Type: Application
    Filed: April 23, 2008
    Publication date: December 11, 2008
    Inventors: Hiroyasu YANASE, Etsuko Nishimura, Toshiaki Kusunoki, Tomoki Nakamura
  • Publication number: 20080272685
    Abstract: Hillock is prevented when aluminum wiring is used in order to reduce line resistance in a display unit. The aluminum wiring is formed into multi-layer structure and each layer contains an element which is not solidly solubilized with aluminum. The element are preferably rare earth metal such as Nd, high-melting point transition metals such as Ta and noble metals such as Pd. Intermetallic compounds of aluminum and the element are educed at an interface of the multi-layer wiring and it is prevented that grains of aluminum are enlarged to form hillock.
    Type: Application
    Filed: April 21, 2008
    Publication date: November 6, 2008
    Inventors: Mitsuharu Ikeda, Toshiaki Kusunoki, Etsuko Nishimura, Tatsumi Hirano, Masatomo Terakado, Takahiro Ueno, Hiroyasu Yanase, Yukio Takasaki, Takaaki Ogasa, Hideyuki Shintani