Patents by Inventor Hiroyoshi Taya

Hiroyoshi Taya has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10998288
    Abstract: A non-leaded semiconductor device comprises a sealing body for sealing a semiconductor chip, a tab in the interior of the sealing body, suspension leads for supporting the tab, leads having respective surfaces exposed to outer edge portions of a back surface of the sealing body, and wires connecting pads formed on the semiconductor chip and the leads. End portions of the suspension leads positioned in an outer periphery portion of the sealing body are unexposed to the back surface of the sealing body, but are covered with the sealing body. Stand-off portions of the suspending leads are not formed in resin molding. When cutting the suspending leads, corner portions of the back surface of the sealing body are supported by a flat portion of a holder portion in a cutting die having an area wider than a cutting allowance of the suspending leads, whereby chipping of the resin is prevented.
    Type: Grant
    Filed: March 1, 2019
    Date of Patent: May 4, 2021
    Assignee: Renesas Electronics Corporation
    Inventors: Tadatoshi Danno, Hiroyoshi Taya, Yoshiharu Shimizu
  • Publication number: 20190198477
    Abstract: A non-leaded semiconductor device comprises a sealing body for sealing a semiconductor chip, a tab in the interior of the sealing body, suspension leads for supporting the tab, leads having respective surfaces exposed to outer edge portions of a back surface of the sealing body, and wires connecting pads formed on the semiconductor chip and the leads. End portions of the suspension leads positioned in an outer periphery portion of the sealing body are unexposed to the back surface of the sealing body, but are covered with the sealing body. Stand-off portions of the suspending leads are not formed in resin molding. When cutting the suspending leads, corner portions of the back surface of the sealing body are supported by a flat portion of a holder portion in a cutting die having an area wider than a cutting allowance of the suspending leads, whereby chipping of the resin is prevented.
    Type: Application
    Filed: March 1, 2019
    Publication date: June 27, 2019
    Inventors: Tadatoshi DANNO, Hiroyoshi TAYA, Yoshiharu SHIMIZU
  • Patent number: 10249595
    Abstract: A non-leaded semiconductor device comprises a sealing body for sealing a semiconductor chip, a tab in the interior of the sealing body, suspension leads for supporting the tab, leads having respective surfaces exposed to outer edge portions of a back surface of the sealing body, and wires connecting pads formed on the semiconductor chip and the leads. End portions of the suspension leads positioned in an outer periphery portion of the sealing body are unexposed to the back surface of the sealing body, but are covered with the sealing body. Stand-off portions of the suspending leads are not formed in resin molding. When cutting the suspending leads, corner portions of the back surface of the sealing body are supported by a flat portion of a holder portion in a cutting die having an area wider than a cutting allowance of the suspending leads, whereby chipping of the resin is prevented.
    Type: Grant
    Filed: October 10, 2017
    Date of Patent: April 2, 2019
    Assignee: Renesas Electronics Corporation
    Inventors: Tadatoshi Danno, Hiroyoshi Taya, Yoshiharu Shimizu
  • Patent number: 10236274
    Abstract: Reduction in reliability of a semiconductor device is suppressed. A semiconductor device includes a plurality of metal patterns formed on a ceramic substrate, and a plurality of semiconductor chips mounted on the plurality of metal patterns. Also, the plurality of metal patterns include metal patterns MPH and MPU which face each other. In addition, a region which is provided between these metal patterns MPH and MPU and which is exposed from the plurality of metal patterns extends so as to zigzag along an extending direction of the metal pattern MPH.
    Type: Grant
    Filed: May 31, 2017
    Date of Patent: March 19, 2019
    Assignee: Renesas Electronics Corporation
    Inventors: Yukihiro Sato, Katsuhiko Funatsu, Takamitsu Kanazawa, Masahiro Koido, Hiroyoshi Taya
  • Publication number: 20180047677
    Abstract: A non-leaded semiconductor device comprises a sealing body for sealing a semiconductor chip, a tab in the interior of the sealing body, suspension leads for supporting the tab, leads having respective surfaces exposed to outer edge portions of a back surface of the sealing body, and wires connecting pads formed on the semiconductor chip and the leads. End portions of the suspension leads positioned in an outer periphery portion of the sealing body are unexposed to the back surface of the sealing body, but are covered with the sealing body. Stand-off portions of the suspending leads are not formed in resin molding. When cutting the suspending leads, corner portions of the back surface of the sealing body are supported by a flat portion of a holder portion in a cutting die having an area wider than a cutting allowance of the suspending leads, whereby chipping of the resin is prevented.
    Type: Application
    Filed: October 10, 2017
    Publication date: February 15, 2018
    Inventors: Tadatoshi DANNO, Hiroyoshi TAYA, Yoshiharu SHIMIZU
  • Patent number: 9806035
    Abstract: A non-leaded semiconductor device comprises a sealing body for sealing a semiconductor chip, a tab in the interior of the sealing body, suspension leads for supporting the tab, leads having respective surfaces exposed to outer edge portions of a back surface of the sealing body, and wires connecting pads formed on the semiconductor chip and the leads. End portions of the suspension leads positioned in an outer periphery portion of the sealing body are unexposed to the back surface of the sealing body, but are covered with the sealing body. Stand-off portions of the suspending leads are not formed in resin molding. When cutting the suspending leads, corner portions of the back surface of the sealing body are supported by a flat portion of a holder portion in a cutting die having an area wider than a cutting allowance of the suspending leads, whereby chipping of the resin is prevented.
    Type: Grant
    Filed: August 12, 2016
    Date of Patent: October 31, 2017
    Assignee: Renesas Electronics Corporation
    Inventors: Tadatoshi Danno, Hiroyoshi Taya, Yoshiharu Shimizu
  • Publication number: 20170263587
    Abstract: Reduction in reliability of a semiconductor device is suppressed. A semiconductor device includes a plurality of metal patterns formed on a ceramic substrate, and a plurality of semiconductor chips mounted on the plurality of metal patterns. Also, the plurality of metal patterns include metal patterns MPH and MPU which face each other. In addition, a region which is provided between these metal patterns MPH and MPU and which is exposed from the plurality of metal patterns extends so as to zigzag along an extending direction of the metal pattern MPH.
    Type: Application
    Filed: May 31, 2017
    Publication date: September 14, 2017
    Inventors: Yukihiro SATO, Katsuhiko FUNATSU, Takamitsu KANAZAWA, Masahiro KOIDO, Hiroyoshi TAYA
  • Patent number: 9698125
    Abstract: Reduction in reliability of a semiconductor device is suppressed. A semiconductor device includes a plurality of metal patterns formed on a ceramic substrate, and a plurality of semiconductor chips mounted on the plurality of metal patterns. Also, the plurality of metal patterns include metal patterns MPH and MPU which face each other. In addition, a region which is provided between these metal patterns MPH and MPU and which is exposed from the plurality of metal patterns extends so as to zigzag along an extending direction of the metal pattern MPH.
    Type: Grant
    Filed: September 24, 2015
    Date of Patent: July 4, 2017
    Assignee: RENESAS ELECTRONICS CORPORATION
    Inventors: Yukihiro Sato, Katsuhiko Funatsu, Takamitsu Kanazawa, Masahiro Koido, Hiroyoshi Taya
  • Patent number: 9666518
    Abstract: A semiconductor device includes a plurality of metal patterns formed on a ceramic substrate, and a semiconductor chip mounted on some of the plurality of metal patterns. Also, a plurality of hollow portions are formed in peripheral portions of the plurality of metal patterns. In addition, the plurality of hollow portions are not formed in a region overlapping the semiconductor chip in the plurality of metal patterns. Furthermore, the plurality of hollow portions are provided in a plurality of metal patterns arranged at a position closest to the peripheral portion of the top surface of the ceramic substrate among the plurality of metal patterns.
    Type: Grant
    Filed: January 31, 2017
    Date of Patent: May 30, 2017
    Assignee: RENESAS ELECTRONICS CORPORATION
    Inventors: Katsuhiko Funatsu, Yukihiro Sato, Takamitsu Kanazawa, Masahiro Koido, Hiroyoshi Taya
  • Publication number: 20170141086
    Abstract: A semiconductor device includes a plurality of metal patterns formed on a ceramic substrate, and a semiconductor chip mounted on some of the plurality of metal patterns. Also, a plurality of hollow portions are formed in peripheral portions of the plurality of metal patterns. In addition, the plurality of hollow portions are not formed in a region overlapping the semiconductor chip in the plurality of metal patterns. Furthermore, the plurality of hollow portions are provided in a plurality of metal patterns arranged at a position closest to the peripheral portion of the top surface of the ceramic substrate among the plurality of metal patterns.
    Type: Application
    Filed: January 31, 2017
    Publication date: May 18, 2017
    Inventors: Katsuhiko FUNATSU, Yukihiro SATO, Takamitsu KANAZAWA, Masahiro KOIDO, Hiroyoshi TAYA
  • Patent number: 9576885
    Abstract: A semiconductor device includes a plurality of metal patterns formed on a ceramic substrate, and a semiconductor chip mounted on some of the plurality of metal patterns. Also, a plurality of hollow portions are formed in peripheral portions of the plurality of metal patterns. In addition, the plurality of hollow portions are not formed in a region overlapping the semiconductor chip in the plurality of metal patterns. Furthermore, the plurality of hollow portions are provided in a plurality of metal patterns arranged at a position closest to the peripheral portion of the top surface of the ceramic substrate among the plurality of metal patterns.
    Type: Grant
    Filed: September 24, 2015
    Date of Patent: February 21, 2017
    Assignee: RENESAS ELECTRONICS CORPORATION
    Inventors: Katsuhiko Funatsu, Yukihiro Sato, Takamitsu Kanazawa, Masahiro Koido, Hiroyoshi Taya
  • Publication number: 20160351512
    Abstract: A non-leaded semiconductor device comprises a sealing body for sealing a semiconductor chip, a tab in the interior of the sealing body, suspension leads for supporting the tab, leads having respective surfaces exposed to outer edge portions of a back surface of the sealing body, and wires connecting pads formed on the semiconductor chip and the leads. End portions of the suspension leads positioned in an outer periphery portion of the sealing body are unexposed to the back surface of the sealing body, but are covered with the sealing body. Stand-off portions of the suspending leads are not formed in resin molding. When cutting the suspending leads, corner portions of the back surface of the sealing body are supported by a flat portion of a holder portion in a cutting die having an area wider than a cutting allowance of the suspending leads, whereby chipping of the resin is prevented.
    Type: Application
    Filed: August 12, 2016
    Publication date: December 1, 2016
    Inventors: Tadatoshi DANNO, Hiroyoshi TAYA, Yoshiharu SHIMIZU
  • Patent number: 9425165
    Abstract: A non-leaded semiconductor device comprises a sealing body for sealing a semiconductor chip, a tab in the interior of the sealing body, suspension leads for supporting the tab, leads having respective surfaces exposed to outer edge portions of a back surface of the sealing body, and wires connecting pads formed on the semiconductor chip and the leads. End portions of the suspension leads positioned in an outer periphery portion of the sealing body are unexposed to the back surface of the sealing body, but are covered with the sealing body. Stand-off portions of the suspending leads are not formed in resin molding. When cutting the suspending leads, corner portions of the back surface of the sealing body are supported by a flat portion of a holder portion in a cutting die having an area wider than a cutting allowance of the suspending leads, whereby chipping of the resin is prevented.
    Type: Grant
    Filed: May 4, 2015
    Date of Patent: August 23, 2016
    Assignee: Renesas Electronics Corporation
    Inventors: Tadatoshi Danno, Hiroyoshi Taya, Yoshiharu Shimizu
  • Publication number: 20160093594
    Abstract: A semiconductor device includes a plurality of metal patterns formed on a ceramic substrate, and a semiconductor chip mounted on some of the plurality of metal patterns. Also, a plurality of hollow portions are formed in peripheral portions of the plurality of metal patterns. In addition, the plurality of hollow portions are not formed in a region overlapping the semiconductor chip in the plurality of metal patterns. Furthermore, the plurality of hollow portions are provided in a plurality of metal patterns arranged at a position closest to the peripheral portion of the top surface of the ceramic substrate among the plurality of metal patterns.
    Type: Application
    Filed: September 24, 2015
    Publication date: March 31, 2016
    Inventors: Katsuhiko FUNATSU, Yukihiro SATO, Takamitsu KANAZAWA, Masahiro KOIDO, Hiroyoshi TAYA
  • Publication number: 20160093589
    Abstract: Reduction in reliability of a semiconductor device is suppressed. A semiconductor device includes a plurality of metal patterns formed on a ceramic substrate, and a plurality of semiconductor chips mounted on the plurality of metal patterns. Also, the plurality of metal patterns include metal patterns MPH and MPU which face each other. In addition, a region which is provided between these metal patterns MPH and MPU and which is exposed from the plurality of metal patterns extends so as to zigzag along an extending direction of the metal pattern MPH.
    Type: Application
    Filed: September 24, 2015
    Publication date: March 31, 2016
    Inventors: Yukihiro SATO, Katsuhiko FUNATSU, Takamitsu KANAZAWA, Masahiro KOIDO, Hiroyoshi TAYA
  • Publication number: 20150235987
    Abstract: A non-leaded semiconductor device comprises a sealing body for sealing a semiconductor chip, a tab in the interior of the sealing body, suspension leads for supporting the tab, leads having respective surfaces exposed to outer edge portions of a back surface of the sealing body, and wires connecting pads formed on the semiconductor chip and the leads. End portions of the suspension leads positioned in an outer periphery portion of the sealing body are unexposed to the back surface of the sealing body, but are covered with the sealing body. Stand-off portions of the suspending leads are not formed in resin molding. When cutting the suspending leads, corner portions of the back surface of the sealing body are supported by a flat portion of a holder portion in a cutting die having an area wider than a cutting allowance of the suspending leads, whereby chipping of the resin is prevented.
    Type: Application
    Filed: May 4, 2015
    Publication date: August 20, 2015
    Inventors: Tadatoshi DANNO, Hiroyoshi TAYA, Yoshiharu SHIMIZU
  • Patent number: 9024419
    Abstract: A non-leaded semiconductor device comprises a sealing body for sealing a semiconductor chip, a tab in the interior of the sealing body, suspension leads for supporting the tab, leads having respective surfaces exposed to outer edge portions of a back surface of the sealing body, and wires connecting pads formed on the semiconductor chip and the leads. End portions of the suspension leads positioned in an outer periphery portion of the sealing body are unexposed to the back surface of the sealing body, but are covered with the sealing body. Stand-off portions of the suspending leads are not formed in resin molding. When cutting the suspending leads, corner portions of the back surface of the sealing body are supported by a flat portion of a holder portion in a cutting die having an area wider than a cutting allowance of the suspending leads, whereby chipping of the resin is prevented.
    Type: Grant
    Filed: November 4, 2013
    Date of Patent: May 5, 2015
    Assignee: Renesas Electronics Corporation
    Inventors: Tadatoshi Danno, Hiroyoshi Taya, Yoshiharu Shimizu
  • Publication number: 20140054759
    Abstract: A non-leaded semiconductor device comprises a sealing body for sealing a semiconductor chip, a tab in the interior of the sealing body, suspension leads for supporting the tab, leads having respective surfaces exposed to outer edge portions of a back surface of the sealing body, and wires connecting pads formed on the semiconductor chip and the leads. End portions of the suspension leads positioned in an outer periphery portion of the sealing body are unexposed to the back surface of the sealing body, but are covered with the sealing body. Stand-off portions of the suspending leads are not formed in resin molding. When cutting the suspending leads, corner portions of the back surface of the sealing body are supported by a flat portion of a holder portion in a cutting die having an area wider than a cutting allowance of the suspending leads, whereby chipping of the resin is prevented.
    Type: Application
    Filed: November 4, 2013
    Publication date: February 27, 2014
    Applicant: Renesas Electronics Corporation
    Inventors: Tadatoshi DANNO, Hiroyoshi TAYA, Yoshiharu SHIMIZU
  • Patent number: 8592961
    Abstract: A non-leaded semiconductor device comprises a sealing body for sealing a semiconductor chip, a tab in the interior of the sealing body, suspension leads for supporting the tab, leads having respective surfaces exposed to outer edge portions of a back surface of the sealing body, and wires connecting pads formed on the semiconductor chip and the leads. End portions of the suspension leads positioned in an outer periphery portion of the sealing body are unexposed to the back surface of the sealing body, but are covered with the sealing body. Stand-off portions of the suspending leads are not formed in resin molding. When cutting the suspending leads, corner portions of the back surface of the sealing body are supported by a flat portion of a holder portion in a cutting die having an area wider than a cutting allowance of the suspending leads, whereby chipping of the resin is prevented.
    Type: Grant
    Filed: July 31, 2012
    Date of Patent: November 26, 2013
    Assignee: Renesas Electronics Corporation
    Inventors: Tadatoshi Danno, Hiroyoshi Taya, Yoshiharu Shimizu
  • Patent number: 8513785
    Abstract: The quality of a non-leaded semiconductor device is to be improved. The semiconductor device comprises a sealing body for sealing a semiconductor chip with resin, a tab disposed in the interior of the sealing body, suspension leads for supporting the tab, plural leads having respective to-be-connected surfaces exposed to outer edge portions of a back surface of the sealing body, and plural wires for connecting pads formed on the semiconductor chip and the leads with each other. End portions of the suspending leads positioned in an outer periphery portion of the sealing body are not exposed to the back surface of the sealing body, but are covered with the sealing body. Therefore, stand-off portions of the suspending leads are not formed in resin molding.
    Type: Grant
    Filed: May 5, 2011
    Date of Patent: August 20, 2013
    Assignee: Renesas Electronics Corporation
    Inventors: Tadatoshi Danno, Hiroyoshi Taya, Yoshiharu Shimizu