Abstract: A clock supplying device for supplying a clock signal to be used in an operation of a communication apparatus, includes an oscillator for generating the clock signal; a measurement unit for acquiring a reference clock signal extracted from a transmission line connected to the communication apparatus, and measuring a frequency difference between the clock signal and the reference clock signal; and a determiner for determining whether a warm-up operation of the oscillator unit has been completed or not, in accordance with measurement results of the frequency difference and a status of power supplying.

Abstract: A clock supplying device for supplying a clock signal to be used in an operation of a communication apparatus, includes an oscillator for generating the clock signal; a measurement unit for acquiring a reference clock signal extracted from a transmission line connected to the communication apparatus, and measuring a frequency difference between the clock signal and the reference clock signal; and a determiner for determining whether a warm-up operation of the oscillator unit has been completed or not, in accordance with measurement results of the frequency difference and a status of power supplying.

Abstract: A system clock supplying device having a duplex structure formed by an own system and another system configured to generate a system clock based on output of a master oscillator in an own device, the system clock supplying device includes a frequency shift measuring determining part configured to measure frequency shift between a reference clock for system synchronization supplied from an outside and a clock output from a master oscillator of the own system and configured to send a frequency shift determining result based on the measuring result to a system clock supplying device of another system; and an abnormality portion determining part configured to determine whether the frequency shift is generated in an output clock of the master oscillator of the own system, an output clock of the master oscillator of the other system or the reference clock, on the basis of a frequency shift determining result of the master oscillator of the own system obtained from the frequency shift measuring determining part of t

Abstract: A communication signal suppressing apparatus capable of reducing a load of a firmware using portion is provided in a communication signal apparatus such as a common line signal apparatus. A common line signal processing circuit corresponds to hardware used to execute a portion of the level-2 process operation, and this common line signal processing circuit owns such a function capable of discarding a reception frame having no meaning other than a confirmation response, and also capable of extracting a reverse-direction sequence number thereof. As a result, the common line signal processing circuit performs a remaining level-2 process operation. Thus, since a workload of a processing apparatus (CPU) using the firmware can be reduced, this firmware can be designed with sufficient capacities. Also, other process operations can be carried out by this CPU.