Patents by Inventor Hiroyuki Abe

Hiroyuki Abe has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220285023
    Abstract: There is provided a biliary atresia diagnosis support management system including a server, the server including a transmission/reception unit receiving an image of stool from a living body and a determination unit determining whether biliary atresia is contracted or not from the image, wherein the server further includes: a management unit including a usage fee saving unit saving received usage fees and a donation sending unit for sending a donation from the saved usage fees; and a doctor's determination request processing unit requesting a determination by a doctor if the determination unit determines that there is a suspected positive result; and if it is diagnosed that the living body needs treatment for biliary atresia as a result of a thorough examination, the server pays a donation for the treatment from the usage fees saved in the usage fee saving unit via the donation sending unit.
    Type: Application
    Filed: August 13, 2020
    Publication date: September 8, 2022
    Applicants: SEKISUI MEDICAL CO., LTD., NATIONAL CENTER FOR CHILD HEALTH AND DEVELOPMENT
    Inventors: Takeshi URAMOTO, Tetsuaki KON, Tomoyoshi SHIROSHITA, Akira MATSUI, Hideki NAKAJIMA, Hiroyuki ABE
  • Patent number: 11428041
    Abstract: A glass panel unit assembly includes a pair of glass substrates arranged to face each other, a peripheral wall, a partition, an air passage, and an evacuation port. The peripheral wall has a frame shape and is provided between the pair of glass substrates. The partition partitions an internal space, surrounded with the pair of glass substrates and the peripheral wall, into a first space and a second space. The air passage connects the first space and the second space together. The evacuation port connects the second space to an external environment. The partition has a broader width than the peripheral wall.
    Type: Grant
    Filed: March 7, 2019
    Date of Patent: August 30, 2022
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventors: Tasuku Ishibashi, Eiichi Uriu, Kazuya Hasegawa, Hiroyuki Abe, Masataka Nonaka, Takeshi Shimizu, Haruhiko Ishikawa
  • Publication number: 20220261109
    Abstract: According to an aspect, a display device with a sensor includes: a substrate including a display region and a peripheral region on a periphery of the display region; detection electrodes arranged in a row-column configuration in the display region; and detection lines coupled to the respective detection electrodes. A shape of the substrate in a plan view includes a curve of a curved portion. The detection electrodes include a first electrode and a second electrode having a shape different from that of the first electrode in a plan view. The second electrode is juxtaposed with the curved portion. The detection lines each include a first line coupled to the first electrode and a second line coupled to the second electrode. The second line passes from the display region across the peripheral region and extends to a position overlapping with the second electrode in a plan view.
    Type: Application
    Filed: May 9, 2022
    Publication date: August 18, 2022
    Applicant: Japan Display Inc.
    Inventors: Hiroyuki ABE, Yoshinori AOKI, Kazune MATSUMURA, Masateru MORIMOTO
  • Publication number: 20220260880
    Abstract: According to an aspect, a display device includes: a substrate; a display region; a peripheral region; signal lines; terminals; wires coupling the terminals and the signal lines in the peripheral region; and first and second metal layers in different layers perpendicularly to the substrate and an insulating film in the peripheral region. The peripheral region includes: a first wiring region, in which the wires are electrically coupled to the signal lines; a second wiring region between the first wiring region and the terminals, and in which at least one or more wires pass through the first and second metal layers; and a third wiring region between the first and second wiring regions, and in which the wires extend in a second direction intersecting the first direction. The third wiring region includes contacts coupling the first and second metal layers, and a virtual line connecting the contacts has a curved shape.
    Type: Application
    Filed: May 2, 2022
    Publication date: August 18, 2022
    Applicant: Japan Display Inc.
    Inventors: Gen KOIDE, Hiroyuki ABE, Kazune MATSUMURA
  • Publication number: 20220243527
    Abstract: A method for manufacturing a glass panel unit includes a working step, an assembling step, a bonding step, and a gas exhausting step. The working step includes a getter material making step including obtaining a getter material containing a zeolite and a cerium compound. The assembling step includes preparing an assembly. The bonding step includes melting a peripheral wall to hermetically bond a first glass pane and a second glass pane. The gas exhausting step includes exhausting a gas from an internal space through an exhaust port to turn the internal space into a vacuum space.
    Type: Application
    Filed: June 16, 2020
    Publication date: August 4, 2022
    Inventors: Hiroyuki ABE, Eiichi URIU, Kazuya HASEGAWA, Tasuku ISHIBASHI, Masataka NONAKA, Takeshi SHIMIZU, Haruhiko ISHIKAWA
  • Publication number: 20220244591
    Abstract: According to an aspect, a display device includes: a first substrate having a first side and a second side opposed to the first side; a display region provided with pixels; a first partial peripheral region between the first side and the display region; a second partial peripheral region between the second side and the display region; a plurality of signal lines configured to supply signals to switching elements in the pixels; a plurality of first terminals provided in the first partial peripheral region and configured to be electrically coupled to a driver integrated circuit; a plurality of second terminals provided in the second partial peripheral region and configured to be supplied with signals for inspection; and a first coupling circuit provided between the first terminals and the display region in the first partial peripheral region and configured to switch between coupling and decoupling the signal lines and the second terminals.
    Type: Application
    Filed: April 22, 2022
    Publication date: August 4, 2022
    Applicant: Japan Display Inc.
    Inventors: Gen Koide, Hiroyuki Abe, Kazune Matsumura
  • Patent number: 11401211
    Abstract: The method for manufacturing the gas adsorption unit includes a preparation step, an activation step, and a sealing step. The preparation step is a step of wrapping a getter with a package material. The activation step is a step of heating the getter wrapped with the package material to activate the getter. The sealing step is a step of melting the package material by heating the package material so as to seal, with the package material, the getter activated in the activation step.
    Type: Grant
    Filed: June 19, 2018
    Date of Patent: August 2, 2022
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventors: Tasuku Ishibashi, Eiichi Uriu, Kazuya Hasegawa, Hiroyuki Abe, Masataka Nonaka, Takeshi Shimizu, Haruhiko Ishikawa
  • Patent number: 11396477
    Abstract: A pillar mounting method includes an accommodation step, a mounting step, and a displacement step. The accommodation step is a step of accommodating a plurality of pillars in storage with the plurality of pillars being stacked on each other. The mounting step is a step of pushing one pillar of the plurality of pillars accommodated in the storage out of the storage and mounting the one pillar on a substrate including a glass pane. The displacement step is a step of changing a relative location between the substrate and the storage. The mounting step and the displacement step are alternately repeated to mount the plurality of pillars in a predetermined arrangement on the substrate such that the plurality of pillars are apart from each other.
    Type: Grant
    Filed: May 16, 2018
    Date of Patent: July 26, 2022
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventors: Masataka Nonaka, Takeshi Shimizu, Haruhiko Ishikawa, Eiichi Uriu, Kazuya Hasegawa, Tasuku Ishibashi, Hiroyuki Abe
  • Patent number: 11393424
    Abstract: A display device with a variant-shape display region other than the rectangular display region is configured to form a scanning line drive circuit along the variant-shape display region. The scanning line drive circuit includes bus wiring group with clock wiring for supplying clocks with three or more phases and the power supply wiring for supplying power, and the unit circuits for configuring the shift register including five or more transistors. The bus wiring and the unit circuits are formed on the different regions so as not to cross with one another.
    Type: Grant
    Filed: December 23, 2020
    Date of Patent: July 19, 2022
    Assignee: Japan Display Inc.
    Inventors: Takayuki Suzuki, Hiroyuki Abe
  • Patent number: 11359431
    Abstract: A method for manufacturing a pillar supply sheet is a method for manufacturing a pillar supply sheet including a plurality of pillars, a carrier sheet, and an adhesion layer between each of the pillars and the carrier sheet, the method including a pillar forming step. The pillar forming step is a step of forming the plurality of pillars by subjecting the base member to an etching process or a laser irradiation process and removing an unnecessary portion from the base member after the process.
    Type: Grant
    Filed: February 15, 2018
    Date of Patent: June 14, 2022
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventors: Hiroyuki Abe, Eiichi Uriu, Kazuya Hasegawa, Masataka Nonaka, Haruhiko Ishikawa, Tasuku Ishibashi, Takeshi Shimizu
  • Patent number: 11353977
    Abstract: According to an aspect, a display device with a sensor includes: a substrate including a display region and a peripheral region on a periphery of the display region; detection electrodes arranged in a row-column configuration in the display region; and detection lines coupled to the respective detection electrodes. A shape of the substrate in a plan view includes a curve of a curved portion. The detection electrodes include a first electrode and a second electrode having a shape different from that of the first electrode in a plan view. The second electrode is juxtaposed with the curved portion. The detection lines each include a first line coupled to the first electrode and a second line coupled to the second electrode. The second line passes from the display region across the peripheral region and extends to a position overlapping with the second electrode in a plan view.
    Type: Grant
    Filed: April 5, 2021
    Date of Patent: June 7, 2022
    Assignee: Japan Display Inc.
    Inventors: Hiroyuki Abe, Yoshinori Aoki, Kazune Matsumura, Masateru Morimoto
  • Patent number: 11355978
    Abstract: First and second sets of magnet assemblies and magnetic assemblies are alternately arranged in a circumferential direction in a first portion along an axial direction, and the first and second sets are alternately arranged in the circumferential direction in a second portion along the axial direction. When viewed in the axial direction, the first set of the first portion and the second set of the second portion overlap with each other, and the second set of the first portion and the first set of the second portion overlap with each other.
    Type: Grant
    Filed: July 23, 2018
    Date of Patent: June 7, 2022
    Assignee: NIDEC CORPORATION
    Inventors: Akira Ichien, Hiroyuki Abe, Hideyuki Kinjo
  • Publication number: 20220170313
    Abstract: Provided are a glass panel unit and a method for manufacturing the glass panel unit, both of which are designed to overcome the problem of poor handleability of known glass panel units with no through holes. A glass panel unit includes a first panel, a second panel, a seal, and a boundary wall. The seal has a frame shape and hermetically bonds respective peripheral edge portions of the first panel and the second panel. The boundary wall partitions an internal space into a first space as a hermetically sealed evacuated space and a second space spatially separated from the first space. The first panel has a first through hole provided through a portion, corresponding to the second space, of the first panel. The second panel has a second through hole provided through a portion, corresponding to the second space and facing the first through hole, of the second panel.
    Type: Application
    Filed: March 5, 2020
    Publication date: June 2, 2022
    Inventors: Tasuku ISHIBASHI, Eiichi URIU, Hiroyuki ABE, Kazuya HASEGAWA, Kenji HASEGAWA, Masataka NONAKA, Takeshi SHIMIZU, Haruhiko ISHIKAWA
  • Patent number: 11347123
    Abstract: According to an aspect, a display device includes: a substrate; a display region; a peripheral region; signal lines; terminals; wires coupling the terminals and the signal lines in the peripheral region; and first and second metal layers in different layers perpendicularly to the substrate and an insulating film in the peripheral region. The peripheral region includes: a first wiring region, in which the wires are electrically coupled to the signal lines; a second wiring region between the first wiring region and the terminals, and in which at least one or more wires pass through the first and second metal layers; and a third wiring region between the first and second wiring regions, and in which the wires extend in a second direction intersecting the first direction. The third wiring region includes contacts coupling the first and second metal layers, and a virtual line connecting the contacts has a curved shape.
    Type: Grant
    Filed: May 3, 2021
    Date of Patent: May 31, 2022
    Assignee: Japan Display Inc.
    Inventors: Gen Koide, Hiroyuki Abe, Kazune Matsumura
  • Publication number: 20220162903
    Abstract: A method for manufacturing a glass panel unit includes an assembling step, a gas exhausting step, and a sealing step. At least one of a first glass pane or a second glass pane includes a low-emissivity film. In a situation where the low-emissivity film is heated at a temperature increase rate of 4° C./min before a peripheral wall is melted, a ratio of an emission quantity of a rare gas emitted from the low-emissivity film at a deformation temperature of the partition to an emission quantity of the rare gas emitted from the low-emissivity film at 100° C. is equal to or less than 2.0.
    Type: Application
    Filed: March 19, 2020
    Publication date: May 26, 2022
    Inventors: Tasuku ISHIBASHI, Eiichi URIU, Kazuya HASEGAWA, Hiroyuki ABE, Masataka NONAKA, Takeshi SHIMIZU
  • Patent number: 11340505
    Abstract: According to an aspect, a display device includes: a first substrate having a first side and a second side opposed to the first side; a display region provided with pixels; a first partial peripheral region between the first side and the display region; a second partial peripheral region between the second side and the display region; a plurality of signal lines configured to supply signals to switching elements in the pixels; a plurality of first terminals provided in the first partial peripheral region and configured to be electrically coupled to a driver integrated circuit; a plurality of second terminals provided in the second partial peripheral region and configured to be supplied with signals for inspection; and a first coupling circuit provided between the first terminals and the display region in the first partial peripheral region and configured to switch between coupling and decoupling the signal lines and the second terminals.
    Type: Grant
    Filed: October 5, 2020
    Date of Patent: May 24, 2022
    Assignee: Japan Display Inc.
    Inventors: Gen Koide, Hiroyuki Abe, Kazune Matsumura
  • Publication number: 20220159160
    Abstract: An electronic device includes a first substrate and a second substrate, a first metal plate, and a second metal plate. On each of the first substrate and the second substrate, an electronic component is mounted. The first substrate and the second substrate are positioned toward a stacking direction with respective main surfaces facing each other. The first metal plate includes a flat portion that is interposed between the first substrate and the second substrate and that directly or indirectly abuts the electronic component mounted on the first substrate and the electronic component mounted on the second substrate, and a first shield portion that covers a portion of the side surface of the first substrate. The second metal plate includes a second shield portion that covers the entire circumference of the side surface of the second substrate and the side surface of the first substrate exposed from the first metal plate. The first metal plate and the second metal plate abut each other directly or indirectly.
    Type: Application
    Filed: March 12, 2020
    Publication date: May 19, 2022
    Applicant: KYOCERA Corporation
    Inventor: Hiroyuki ABE
  • Publication number: 20220154522
    Abstract: Provided is a glass panel unit that reduces the chances of an electric wire extended being disconnected. A glass panel unit includes a first panel, a second panel, a seal, a connecting void, and an electric wire. The first panel includes a first glass pane. The second panel includes a second glass pane and is arranged to face the second glass pane. The seal has a frame shape and hermetically bonds respective peripheral edge portions of the first panel and the second panel to create an internal space between the first panel and the second panel. The connecting void is provided for a portion, other than a portion facing the internal space, of at least one of the first panel or the second panel. The electric wire is extended from the internal space to the connecting void by passing through the seal.
    Type: Application
    Filed: March 5, 2020
    Publication date: May 19, 2022
    Inventors: Tasuku ISHIBASHI, Eiichi URIU, Kazuya HASEGAWA, Hiroyuki ABE, Kenji HASEGAWA, Masataka NONAKA, Takeshi SHIMIZU
  • Publication number: 20220152993
    Abstract: A method for manufacturing a multi-layer stack includes bonding a transparent plate to an outer surface of at least one of a first glass panel or a second glass panel of a glass panel unit with an intermediate film interposed therebetween. The glass panel unit includes: the first glass panel; the second glass panel; and an evacuated space provided between the first glass panel and the second glass panel. A plurality of spacers are provided in the evacuated space between the first glass panel and the second glass panel. A pressure applied for bonding the glass panel unit and the transparent plate together is less than a compressive strength of the plurality of spacers.
    Type: Application
    Filed: March 25, 2020
    Publication date: May 19, 2022
    Inventors: Kenji HASEGAWA, Eiichi URIU, Tasuku ISHIBASHI, Hiroyuki ABE
  • Publication number: 20220150388
    Abstract: An electronic device 10 includes a first substrate 12, a second substrate 13, a third substrate 14, a first metal plate 15, and a second metal plate 16. An electronic component 21 is mounted on the first substrate 12. An electronic component 23 is mounted on the second substrate 13. An electronic component 23 is mounted on the third substrate 14. The first metal plate 15 includes a first flat portion 27 and a first shield portion 28. The first flat portion 27 is interposed between the first substrate 12 and the second substrate 13. The first flat portion 27 abuts the electronic component 23. The first shield portion 28 covers the entire circumference of a side surface of the first substrate 12. The second metal plate 16 includes a second flat portion 32 and a second shield portion 33. The second flat portion 32 is interposed between the second substrate 13 and the third substrate 14. The second flat portion 32 abuts the electronic component 23.
    Type: Application
    Filed: March 12, 2020
    Publication date: May 12, 2022
    Applicant: KYOCERA Corporation
    Inventors: Hiroyuki ABE, Kazuki SHIRATO