Patents by Inventor Hiroyuki Fujisada

Hiroyuki Fujisada has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 4863880
    Abstract: A method of manufacturing an InSb device that uses an anodic oxide layer as a structural element, utilizing a voltage-controlled mechanism to control the thickness of the anodic oxide layer formation, and in which the anodization time under an anodization limiting voltage is not less than 10 seconds and not more than 20 minutes.
    Type: Grant
    Filed: March 22, 1988
    Date of Patent: September 5, 1989
    Assignee: Agency of Industrial Science & Technology, Ministry of International Trade & Industry
    Inventor: Hiroyuki Fujisada
  • Patent number: 4204132
    Abstract: A semiconductor capable of exhibiting an electron transfer effect in a high electric field is used as a Hall element. Application of a voltage large enough to give rise to an electron transfer effect to the current input electrodes of the Hall element brings about a decrease in the concentration of electrons contributing to the Hall effect occurring within the semiconductor, an increase in the Hall coefficient and a notable enhancement in the sensitivity of the Hall element.
    Type: Grant
    Filed: August 8, 1977
    Date of Patent: May 20, 1980
    Assignee: Agency of Industrial Science & Technology, Ministry of International Trade & Industry
    Inventors: Shoei Kataoka, Yoshinobu Sugiyama, Hiroyuki Fujisada
  • Patent number: 4182964
    Abstract: Occurrence of high field domain in the conventional Gunn diode is prevented by covering a solid body such as a semiconductor element partially or wholly by a dielectric member or by a control element such as a metallic layer coupled reactively with the solid body through a dielectric member, whereby a solid state element having a negative differential conductivity is obtained. Such a type of negative-resistance solid state element, together with its various modes of embodimental construction disclosed herein, affords a superior solid state element which is applicable to amplifiers, oscillators, logic memories, and the like of millimeter or submillimeter bands.
    Type: Grant
    Filed: July 20, 1972
    Date of Patent: January 8, 1980
    Assignee: Kogyo Gijutsuin
    Inventors: Shoei Kataoka, Hiroshi Tateno, Hiroyuki Fujisada, Hideo Yamada, Mitsuo Kawashima, Yasuo Komamiya