Patents by Inventor Hiroyuki Gunji

Hiroyuki Gunji has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11933771
    Abstract: A first liquid sending controller of an analysis control device controls a first liquid sender such that a mobile phase is supplied to a fluorescence detector through an analysis column and a junction during an analysis of a sample. A sample introduction controller controls a sample introducer such that the sample is introduced into a mobile phase by the sample introducer at a position farther upstream than the analysis column during the analysis of the sample. The second liquid sending controller causes a second liquid sender to start supplying a fluorescent reaction liquid such that the fluorescent reaction liquid arrives at the junction later than a point in time at which supply of the mobile phase starts and before the sample introduced into the mobile phase arrives at the junction during the analysis of the sample. A generator generates a chromatogram based on an output signal of the fluorescence detector during the analysis of the sample.
    Type: Grant
    Filed: December 20, 2018
    Date of Patent: March 19, 2024
    Assignee: SHIMADZU CORPORATION
    Inventors: Hiroyuki Minato, Masahide Gunji
  • Publication number: 20230203642
    Abstract: Nanoclusters are produced in a gas phase using a nanocluster manufacturing section including: a vacuum container; a sputtering source that has a target as a cathode, performs magnetron sputtering by pulse discharge, and generates plasma; a pulse power source that supplies pulsed power to the sputtering source; a first inert gas supply section that supplies a first inert gas to the sputtering source; a nanocluster growth cell that is contained in the vacuum container; and a second inert gas introduction section that introduces a second inert gas into the nanocluster growth cell. A multitude of supports are rolled in the gas phase and each of the supports is sprinkled with a multitude of nanoclusters to cause each support to support the multitude of nanoclusters.
    Type: Application
    Filed: June 8, 2021
    Publication date: June 29, 2023
    Inventors: Atsushi NAKAJIMA, Hironori TSUNOYAMA, Mika UNO, Hiroyuki GUNJI, Toshihiro ANDO, Keizo TSUKAMOTO, Masahide TONA, Naoyuki HIRATA
  • Publication number: 20230168373
    Abstract: The array-type scanning acoustic tomograph includes a selection unit to select the elements constituting a vibrator group that connects vibrator drive signals and reception signals. The vibrator group is divided into a first group that emits ultrasonic beams to a former half of an ultrasonic beam irradiation region and a second group that emits ultrasonic beams to a latter half of the ultrasonic beam irradiation region. The selection unit is instructed to select the vibrator groups of the first group to emit ultrasonic beams, instructed to select the vibrator group of the second group to emit ultrasonic beams, then the selection unit is instructed to select the vibrator groups of the first group to receive reflected ultrasonic waves, and then instructed to select the vibrator group of the second group to receive reflected ultrasonic wave, and the same waveforms are displayed on a display unit without overlapping.
    Type: Application
    Filed: November 23, 2022
    Publication date: June 1, 2023
    Inventors: Takaaki MAYUZUMI, Kaoru KITAMI, Hiroyuki GUNJI
  • Publication number: 20220394410
    Abstract: A voice output control device includes a base control unit configured to set, based on information on relative positions between an own base of the base control unit and other bases, a direction of a position where voice to be output to each of the other bases is localized, and set, based on information on relative distances between the own base and the other bases, a height of the position where the voice is localized; and a sound source processor configured to localize voice from the other base to generate a voice signal to be output, based on the position set by the base control unit.
    Type: Application
    Filed: August 17, 2022
    Publication date: December 8, 2022
    Inventors: Kazuomi Tachigi, Hiroyuki Gunji
  • Patent number: 11142000
    Abstract: A printing apparatus provided with a transportation mechanism for a printing medium includes: a storage configured to store a machine-learned model that outputs a setting value of the transportation mechanism for causing, based on state variables including a print length as a length of a print product printed on the printing medium, the print length to be close to a reference; and a processor configured to perform printing by controlling the transportation mechanism in accordance with the setting value acquired based on the machine-learned model.
    Type: Grant
    Filed: January 15, 2020
    Date of Patent: October 12, 2021
    Assignee: Seiko Epson Corporation
    Inventor: Hiroyuki Gunji
  • Publication number: 20200258026
    Abstract: A service person selecting device includes a storage that stores a machine-learned model subjected to machine learning using teaching data in which service person selection information, which is at least one of error information of a printing device, estimated required time period information of service persons that is related to estimated required time periods up to times when the service persons perform a task of maintaining the printing device in which an error has occurred, skill information of the service persons, and held component information of the service persons, is associated with a service person dispatched to maintain the printing device in which the error has occurred, and a controller that acquires the service person selection information and uses the acquired service person selection information and the machine-learned model to select a service person to be dispatched to maintain the printing device in which the error has occurred upon the occurrence of the error in the printing device.
    Type: Application
    Filed: February 6, 2020
    Publication date: August 13, 2020
    Inventors: Hajime NISHIZAWA, Hiroyuki GUNJI
  • Publication number: 20200230981
    Abstract: A printing apparatus provided with a transportation mechanism for a printing medium includes: a storage configured to store a machine-learned model that outputs a setting value of the transportation mechanism for causing, based on state variables including a print length as a length of a print product printed on the printing medium, the print length to be close to a reference; and a processor configured to perform printing by controlling the transportation mechanism in accordance with the setting value acquired based on the machine-learned model.
    Type: Application
    Filed: January 15, 2020
    Publication date: July 23, 2020
    Inventor: Hiroyuki GUNJI
  • Patent number: 10663433
    Abstract: An object is to simultaneously visualize a plurality of junction surfaces of a workpiece. An ultrasound imaging device serving as solution means includes a signal processing unit that causes a probe to irradiate a workpiece with an ultrasound wave having a predetermined frequency, and that performs gate processing on a reflected wave of the ultrasound wave detected by the probe so as to output a displacement of the reflected wave on two junction surfaces of the workpiece, an image generation unit that generates respective images of the two junction surfaces, based on the displacement of the respective reflected waves on the two junction surfaces, and a height adjustment unit that adjusts a height of a focus of the probe. The height adjustment unit adjusts the height of the probe so as to set the focus of the probe between the two junction surfaces.
    Type: Grant
    Filed: April 12, 2017
    Date of Patent: May 26, 2020
    Assignee: Hitachi Power Solutions, Co., Ltd.
    Inventors: Masamichi Umeda, Kaoru Kitami, Hiroyuki Gunji
  • Publication number: 20190296301
    Abstract: A sealing structure includes a main body, a lid that seals an opening of the main body, a slide unit provided in the lid and slidable along the main body, and a plurality of protrusions provided along the sliding direction of the slide unit at the opening of the main body. The slide unit includes a plurality of lock levers provided to correspond to the plurality of protrusions, and claws that engage with the plurality of protrusions at the time when the slide unit slides in a predetermined direction.
    Type: Application
    Filed: February 15, 2019
    Publication date: September 26, 2019
    Inventors: Takashi Hori, Hideaki Suzuki, Hiroyuki Gunji
  • Publication number: 20190113480
    Abstract: An object is to simultaneously visualize a plurality of junction surfaces of a workpiece. An ultrasound imaging device serving as solution means includes a signal processing unit that causes a probe to irradiate a workpiece with an ultrasound wave having a predetermined frequency, and that performs gate processing on a reflected wave of the ultrasound wave detected by the probe so as to output a displacement of the reflected wave on two junction surfaces of the workpiece, an image generation unit that generates respective images of the two junction surfaces, based on the displacement of the respective reflected waves on the two junction surfaces, and a height adjustment unit that adjusts a height of a focus of the probe. The height adjustment unit adjusts the height of the probe so as to set the focus of the probe between the two junction surfaces.
    Type: Application
    Filed: April 12, 2017
    Publication date: April 18, 2019
    Applicant: HITACHI POWER SOLUTIONS CO., LTD.
    Inventors: Masamichi UMEDA, Kaoru KITAMI, Hiroyuki GUNJI
  • Patent number: 7994535
    Abstract: To improve the surge resistance of J-FET, a P-type epitaxial layer 2 and an N-type epitaxial layer 3 are formed on a P++-conductive substrate 1; N+-conductive source diffusion layer 4 and drain diffusion layer 5, and a p+-conductive gate diffusion layer 6 are formed in the N-type epitaxial layer 3; and a short-circuit preventing layer 8 of a reversed conduction-type diffusion layer is formed adjacent to the side walls of the source diffusion layer 4 and the drain diffusion layer 5. Having the constitution, the punch-through to be caused by surge voltage is prevented in the surface region of the device, and the surge resistance thereof is improved. Via the holes formed in a protective insulation film 9 on the surface of the device, a source electrode 10 connected to the source diffusion layer 4, and a drain electrode 11 connected to the drain diffusion layer 5 are formed on the surface side of the device.
    Type: Grant
    Filed: May 28, 2004
    Date of Patent: August 9, 2011
    Assignee: Panasonic Corporation
    Inventors: Hiroyuki Gunji, Tetsushi Otaki
  • Patent number: 7187041
    Abstract: A first region 11 functioning as a transistor includes a drain region 111, a body region 112 formed over the drain region 111, a source region 113A formed over the body region 112 and a trench formed through the body region 112 and having a gate electrode 120 buried therein. A source region 113B is formed over the body region 112 extending in a second region 12.
    Type: Grant
    Filed: October 13, 2004
    Date of Patent: March 6, 2007
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Shuji Mizokuchi, Mitsuhiro Yamanaka, Hiroyuki Gunji
  • Publication number: 20060186466
    Abstract: A first region 11 functioning as a transistor includes a drain region 111, a body region 112 formed over the drain region 111, a source region 113A formed over the body region 112 and a trench formed through the body region 112 and having a gate electrode 120 buried therein. A source region 113B is formed over the body region 112 extending in a second region 12.
    Type: Application
    Filed: April 24, 2006
    Publication date: August 24, 2006
    Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
    Inventors: Shuji Mizokuchi, Mitsuhiro Yamanaka, Hiroyuki Gunji
  • Publication number: 20050133861
    Abstract: A first region 11 functioning as a transistor includes a drain region 111, a body region 112 formed over the drain region 111, a source region 113A formed over the body region 112 and a trench formed through the body region 112 and having a gate electrode 120 buried therein. A source region 113B is formed over the body region 112 extending in a second region 12.
    Type: Application
    Filed: October 13, 2004
    Publication date: June 23, 2005
    Applicant: MATSUSHITA ELECRIC INDUSTRIAL CO., LTD.
    Inventors: Shuji Mizokuchi, Mitsuhiro Yamanaka, Hiroyuki Gunji
  • Publication number: 20040238840
    Abstract: To improve the surge resistance of J-FET, a P-type epitaxial layer 2 and an N-type epitaxial layer 3 are formed on a P++-conductive substrate 1; N+-conductive source diffusion layer 4 and drain diffusion layer 5, and a p+-conductive gate diffusion layer 6 are formed in the N-type epitaxial layer 3; and a short-circuit preventing layer 8 of a reversed conduction-type diffusion layer is formed adjacent to the side walls of the source diffusion layer 4 and the drain diffusion layer 5. Having the constitution, the punch-through to be caused by surge voltage is prevented in the surface region of the device, and the surge resistance thereof is improved. Via the holes formed in a protective insulation film 9 on the surface of the device, a source electrode 10 connected to the source diffusion layer 4, and a drain electrode 11 connected to the drain diffusion layer 5 are formed on the surface side of the device.
    Type: Application
    Filed: May 28, 2004
    Publication date: December 2, 2004
    Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
    Inventors: Hiroyuki Gunji, Tetsushi Otaki
  • Publication number: 20040151817
    Abstract: The invention provides a process for producing a baked food of wheat flour by using a soybean protein in which NSI shows a low denature value of 40 or more, the content of solid component extracted with a solvent mixture of chloroform and methanol (2:1) is 2.0 wt % or less, and the crude protein content is 63% or more. When wheat flour in dough is replaced with the soybean protein at a small ratio, baked foods of wheat flour which are resistant to freezing and show good texture even after thawing in a microwave oven can be obtained. Moreover, a process for making a baked food mainly comprising soybean proteins, which has a good taste and texture and is appropriately taken by human, can be provided by replacing most part or all of wheat flour with a soybean protein.
    Type: Application
    Filed: December 5, 2003
    Publication date: August 5, 2004
    Inventors: Yoichi Fukuda, Yasue Nagao, Yasuko Matuzaki, Shinichi Imai, Hiroyuki Gunji
  • Patent number: 6181660
    Abstract: A digital signal processor circuit is provided which is operable to perform n-bit serial-to-parallel conversion with respect to data of one-bit serial form as read out of a recording medium thereby enabling correct detection of a synchronization pattern contained for transmission in such n-bit data and also correct data demodulation while at the same time achieving semiconductor integration with less power dissipation.
    Type: Grant
    Filed: November 3, 1998
    Date of Patent: January 30, 2001
    Assignee: Hitachi, Ltd.
    Inventors: Hiroshi Hirayama, Toshifumi Takeuchi, Hiroyuki Gunji
  • Patent number: 6092232
    Abstract: A disk data reproducing apparatus and a disk data reproducing method for carrying out error correction at fixed intervals independent of demodulation rate fluctuations caused by variable disk revolutions during access, whereby the reliability of error correction is improved. Data are demodulated by use of a regenerative clock signal acquired in keeping with the input data rate, whereas error correction is conducted at a fixed frequency clock signal. Two counters are provided, one being incremented by a signal generated upon detection of a block top, the other counter being incremented by a signal generated when a block of erroneous data is corrected. The two computers are compared in contents so that depending on the result of the comparison, an error correction start signal is generated. Error correction is performed always at fixed intervals regardless of the velocity of reproduction being standard, doubled, quadrupled, or multiplied by a factor of j (j: natural number).
    Type: Grant
    Filed: March 17, 1998
    Date of Patent: July 18, 2000
    Assignee: Hitachi, Ltd.
    Inventors: Yutaka Nagai, Tomoaki Kudo, Masayuki Hirabayashi, Toshifumi Takeuchi, Hiroyuki Gunji