Abstract: A backside contact solar cell has, on a first main surface of a crystal silicon substrate, a p-type region having a p-conductive type and an n-type region having an n-conductive type, and a positive electrode formed on the p-type region and a negative electrode formed on the n-type region, wherein the positive electrode includes a laminated conductor of a first electric conductor which is formed on the p-type region and which includes a group III element and a second electric conductor which is laminated on the first electric conductor and which has a lower content ratio of the group III element than the first electric conductor, and the negative electrode includes the second electric conductor formed on the n-type region. In this way, a low-cost backside contact solar cell has a high photoelectric conversion efficiency.

Abstract: A SGPMOS transistor includes a base, a P-type diffusion layer, a gate electrode, and a LOCOS oxide film. The base includes at least one of a N-type semiconductor substrate, a P-type semiconductor substrate, and a N-type well. The P-type diffusion layer includes a P-type source and a P-type drain. At least the P-type drain includes a double diffusion structure including first and second P-type drain diffusion layers. The LOCOS oxide film is provided on the first P-type drain diffusion layer and covered by an end of the gate electrode. The first and the second P-type drain diffusion layers satisfy a relation of Y<Xj, in which Y represents a distance of the first P-type drain diffusion layer between the second P-type drain diffusion layer and the channel, and Xj represents a difference between depths of the second P-type drain diffusion layer and the first P-type drain diffusion layer.

Abstract: A SGPMOS transistor includes a base, a P-type diffusion layer, a gate electrode, and a LOCOS oxide film. The base includes at least one of a N-type semiconductor substrate, a P-type semiconductor substrate, and a N-type well. The P-type diffusion layer includes a P-type source and a P-type drain. At least the P-type drain includes a double diffusion structure including first and second P-type drain diffusion layers. The LOCOS oxide film is provided on the first P-type drain diffusion layer and covered by an end of the gate electrode. The first and the second P-type drain diffusion layers satisfy a relation of Y<Xj, in which Y represents a distance of the first P-type drain diffusion layer between the second P-type drain diffusion layer and the channel, and Xj represents a difference between depths of the second P-type drain diffusion layer and the first P-type drain diffusion layer.

Abstract: A semiconductor device includes an NMOS switching element having an N-type drain diffusion region coupled to an input and/or output terminal, and an N-type source diffusion region and a P-type substrate contact diffusion region coupled to a ground line; and an NMOS protection element having an N-type drain diffusion region coupled to the input and/or output terminal, and a gate, an N-type source diffusion region and a P-type substrate contact diffusion region coupled to the ground line, wherein the N-type source diffusion region and the P-type substrate contact diffusion region of the NMOS switching element are arranged adjacent to each other, and the N-type source diffusion region and the P-type substrate contact diffusion region of the NMOS protection element are arranged with a spacing therebetween. If the N and P types are interchanged, the ground line is replaced by a power supply line.