Patents by Inventor Hiroyuki Hirashima

Hiroyuki Hirashima has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20060220692
    Abstract: A first sampling capacitor 3 is connected between an output terminal of a first analog switch 1 and the ground, and an input terminal of a second analog switch 2 is connected to a node between the first analog switch 1 and the first sampling capacitor 3. A second sampling capacitor 4 is connected between an output terminal of the first analog switch 1 and the ground. A control part turning on the first and second analog switches 1 and 2 in a state in which an input voltage is applied to the input terminal of the first analog switch 1, thereafter turns off the second analog switch 2, subsequently turns off the first analog switch 1 and subsequently turns on the second analog switch 2.
    Type: Application
    Filed: March 28, 2006
    Publication date: October 5, 2006
    Inventor: Hiroyuki Hirashima
  • Patent number: 6043998
    Abstract: A voltage multiplying device of the present invention is provided with: a voltage multiplication level setting circuit for setting a voltage multiplying level which indicates how many times the power source voltage is multiplied; a voltage multiplication pulse signal generating circuit for outputting a plurality of voltage multiplication pulse signals, each having a predetermined period and varying with a predetermined phase difference; a condition decoder circuit and a voltage multiplication pulse selecting circuit for outputting a voltage multiplication controlling signal, which varies in accordance with the determined voltage multiplication level, in synchronization with the pulse signal; and a voltage multiplication level outputting circuit for multiplying the power source voltage step by step to the set voltage multiplication level in accordance with the voltage multiplication controlling signal and for outputting the voltage multiplication level in each of the steps.
    Type: Grant
    Filed: June 15, 1999
    Date of Patent: March 28, 2000
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Hiroyuki Hirashima, Masahiko Monomohshi
  • Patent number: 5801671
    Abstract: A liquid crystal display panel 51 of N rows.times.M columns is driven by a segment driver 52 with two different voltages VS1, VS2, and by a common driver 53 with three voltages VC1, VC2, VC3. An output voltage waveform of the segment driver 52 is modulated for gradation display. The two different voltages VS1, VS2 are selected to be low voltages so as not to require high withstand voltage process in the segment driver 52, which makes it easier to integrated to a large scale in the case of realizing the segment driver 52 as a semiconductor integrated circuit.
    Type: Grant
    Filed: April 12, 1996
    Date of Patent: September 1, 1998
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Masakazu Kobayashi, Tatsuya Nakai, Hiroyuki Hirashima, Masahiko Monomohshi, Yoshiki Sano
  • Patent number: 5365250
    Abstract: A semiconductor device for driving a liquid crystal panel includes an output unit for generating output signals to drive a liquid crystal panel, a terminal for supplying a voltage from a power supply in the outside of the device, a voltage changing unit connected to the terminal for changing the voltage through the terminal into a voltage necessary for a self burn-in test and for supplying the output unit with the changed voltage, and a control unit for controlling the output unit to conduct the self burn-in test when a predetermined control signal is applied thereto from the outside of the device.
    Type: Grant
    Filed: September 10, 1992
    Date of Patent: November 15, 1994
    Assignee: Sharp Kabushiki Kaisha
    Inventor: Hiroyuki Hirashima