Patents by Inventor Hiroyuki Kaneda

Hiroyuki Kaneda has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11984924
    Abstract: A transmit/receive module includes plural duplexers, a power amplifier, and a sending transmission line. The plural duplexers operate in bands different from each other and each includes a transmit filter and a receive filter. The power amplifier amplifies signals of pass bands of the plural transmit filters and outputs the amplified signals. The sending transmission line is connected to the plural transmit filters. The signals of the pass bands of the plural transmit filters output from the power amplifier are transmitted through the sending transmission line.
    Type: Grant
    Filed: December 12, 2019
    Date of Patent: May 14, 2024
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Seima Kondo, Satoshi Tanaka, Satoshi Arayashiki, Hiroyuki Furusato, Jin Yokoyama, Toru Yamaji, Akio Kaneda, Kiwamu Sakano, Junichi Yoshioka, Tatsuya Tsujiguchi, Atushi Ono
  • Publication number: 20240149773
    Abstract: Disclosed is a seat including: sensors which includes a first cushion sensor provided at a seat cushion in a position corresponding to buttocks of an occupant, a second cushion sensor provided at the seat cushion and located farther frontward than the first cushion sensor, a first back sensor provided at a seat back and located in a lower position thereof, and a second back sensor provided at the seat back and located above the first back sensor; and a controller connected to the sensors and thereby allowed to acquire pressure values from the respective sensors. The controller is configured to identify the motion of the occupant based on outputs of at least two sensors of the first cushion sensor, the second cushion sensor, the first back sensor, and the second back sensor.
    Type: Application
    Filed: January 9, 2024
    Publication date: May 9, 2024
    Inventors: Hiroyuki KAKU, Atsushi KUSANO, Hiroyuki NUMAJIRI, Satoshi FUJITA, Takako MIYOSHI, Munetaka KOWA, Ryuichiro HIROSE, Yoshikazu ITO, Yosuke HIGASHI, Satoshi SUZUKI, Ryosuke SATO, Kento UETAKE, Yasuharu OTSUKA, Satoru KANEDA
  • Patent number: 11958385
    Abstract: A seat includes a seat body and a sensor configured to acquired information on an occupant seated on the seat body. The seat includes a coating as a location marker that marks a location of the sensor to render the location visually recognizable from outside the seat body.
    Type: Grant
    Filed: March 29, 2019
    Date of Patent: April 16, 2024
    Assignee: TS TECH CO., LTD.
    Inventors: Hiroyuki Kaku, Ryuichiro Hirose, Hiroyuki Numajiri, Satoshi Fujita, Takako Miyoshi, Munetaka Kowa, Atsushi Kusano, Yoshikazu Ito, Yousuke Higashi, Satoshi Suzuki, Ryosuke Sato, Kento Uetake, Yasuharu Otsuka, Satoru Kaneda
  • Patent number: 11932147
    Abstract: Disclosed is a seat including: sensors which includes a first cushion sensor provided at a seat cushion in a position corresponding to buttocks of an occupant, a second cushion sensor provided at the seat cushion and located farther frontward than the first cushion sensor, a first back sensor provided at a seat back and located in a lower position thereof, and a second back sensor provided at the seat back and located above the first back sensor; and a controller connected to the sensors and thereby allowed to acquire pressure values from the respective sensors. The controller is configured to identify the motion of the occupant based on outputs of at least two sensors of the first cushion sensor, the second cushion sensor, the first back sensor, and the second back sensor.
    Type: Grant
    Filed: February 28, 2019
    Date of Patent: March 19, 2024
    Assignee: TS TECH CO., LTD.
    Inventors: Hiroyuki Kaku, Atsushi Kusano, Hiroyuki Numajiri, Satoshi Fujita, Takako Miyoshi, Munetaka Kowa, Ryuichiro Hirose, Yoshikazu Ito, Yosuke Higashi, Satoshi Suzuki, Ryosuke Sato, Kento Uetake, Yasuharu Otsuka, Satoru Kaneda
  • Publication number: 20230207555
    Abstract: A semiconductor device includes a semiconductor substrate, an element region including an active element formed at the semiconductor substrate, a channel stopper formed in an outer peripheral region of the semiconductor substrate, and an insulating film that covers a surface of the semiconductor substrate and that has a first contact hole by which the channel stopper is exposed. The semiconductor device further includes a first field plate, a second field plate, and an equipotential ring electrode. The first field plate is formed on the insulating film, and faces the semiconductor substrate between the channel stopper and the element region through the insulating film. The second field plate is embedded in the insulating film, and faces the semiconductor substrate between the first field plate and the channel stopper through the insulating film. The equipotential ring electrode is formed along an outer peripheral region of the semiconductor substrate.
    Type: Application
    Filed: March 6, 2023
    Publication date: June 29, 2023
    Inventor: Hiroyuki KANEDA
  • Patent number: 11621260
    Abstract: A semiconductor device includes a semiconductor substrate, an element region including an active element formed at the semiconductor substrate, a channel stopper formed in an outer peripheral region of the semiconductor substrate, and an insulating film that covers a surface of the semiconductor substrate and that has a first contact hole by which the channel stopper is exposed. The semiconductor device further includes a first field plate, a second field plate, and an equipotential ring electrode. The first field plate is formed on the insulating film, and faces the semiconductor substrate between the channel stopper and the element region through the insulating film. The second field plate is embedded in the insulating film, and faces the semiconductor substrate between the first field plate and the channel stopper through the insulating film. The equipotential ring electrode is formed along an outer peripheral region of the semiconductor substrate.
    Type: Grant
    Filed: May 8, 2020
    Date of Patent: April 4, 2023
    Assignee: ROHM CO., LTD.
    Inventor: Hiroyuki Kaneda
  • Publication number: 20200273854
    Abstract: A semiconductor device includes a semiconductor substrate, an element region including an active element formed at the semiconductor substrate, a channel stopper formed in an outer peripheral region of the semiconductor substrate, and an insulating film that covers a surface of the semiconductor substrate and that has a first contact hole by which the channel stopper is exposed. The semiconductor device further includes a first field plate, a second field plate, and an equipotential ring electrode. The first field plate is formed on the insulating film, and faces the semiconductor substrate between the channel stopper and the element region through the insulating film. The second field plate is embedded in the insulating film, and faces the semiconductor substrate between the first field plate and the channel stopper through the insulating film. The equipotential ring electrode is formed along an outer peripheral region of the semiconductor substrate.
    Type: Application
    Filed: May 8, 2020
    Publication date: August 27, 2020
    Inventor: Hiroyuki KANEDA
  • Patent number: 10692850
    Abstract: A semiconductor device includes a semiconductor substrate, an element region including an active element formed at the semiconductor substrate, a channel stopper formed in an outer peripheral region of the semiconductor substrate, and an insulating film that covers a surface of the semiconductor substrate and that has a first contact hole by which the channel stopper is exposed. The semiconductor device further includes a first field plate, a second field plate, and an equipotential ring electrode. The first field plate is formed on the insulating film, and faces the semiconductor substrate between the channel stopper and the element region through the insulating film. The second field plate is embedded in the insulating film, and faces the semiconductor substrate between the first field plate and the channel stopper through the insulating film. The equipotential ring electrode is formed along an outer peripheral region of the semiconductor substrate.
    Type: Grant
    Filed: April 25, 2017
    Date of Patent: June 23, 2020
    Assignee: ROHM CO., LTD.
    Inventor: Hiroyuki Kaneda
  • Publication number: 20170317068
    Abstract: A semiconductor device includes a semiconductor substrate, an element region including an active element formed at the semiconductor substrate, a channel stopper formed in an outer peripheral region of the semiconductor substrate, and an insulating film that covers a surface of the semiconductor substrate and that has a first contact hole by which the channel stopper is exposed. The semiconductor device further includes a first field plate, a second field plate, and an equipotential ring electrode. The first field plate is formed on the insulating film, and faces the semiconductor substrate between the channel stopper and the element region through the insulating film. The second field plate is embedded in the insulating film, and faces the semiconductor substrate between the first field plate and the channel stopper through the insulating film. The equipotential ring electrode is formed along an outer peripheral region of the semiconductor substrate.
    Type: Application
    Filed: April 25, 2017
    Publication date: November 2, 2017
    Inventor: Hiroyuki KANEDA
  • Patent number: 9536859
    Abstract: A semiconductor device includes a semiconductor element, a lead, and a wire including a first bonding portion bonded to the semiconductor element and a second bonding portion bonded to the lead. The semiconductor element includes a first bonding surface which faces to a first side in a first direction and to which the first bonding portion is bonded. The lead includes a second bonding surface and a third bonding surface both facing to the first side in the first direction and forming an angle larger than 180° on the first side in the first direction. The semiconductor device further includes a ball bump extending onto both the second bonding surface and the third bonding surface. The second bonding portion is bonded to the lead via the ball bump.
    Type: Grant
    Filed: May 26, 2015
    Date of Patent: January 3, 2017
    Assignee: ROHM CO., LTD.
    Inventor: Hiroyuki Kaneda
  • Publication number: 20150255425
    Abstract: A semiconductor device includes a semiconductor element, a lead, and a wire including a first bonding portion bonded to the semiconductor element and a second bonding portion bonded to the lead. The semiconductor element includes a first bonding surface which faces to a first side in a first direction and to which the first bonding portion is bonded. The lead includes a second bonding surface and a third bonding surface both facing to the first side in the first direction and forming an angle larger than 180° on the first side in the first direction. The semiconductor device further includes a ball bump extending onto both the second bonding surface and the third bonding surface. The second bonding portion is bonded to the lead via the ball bump.
    Type: Application
    Filed: May 26, 2015
    Publication date: September 10, 2015
    Inventor: Hiroyuki KANEDA
  • Patent number: 9070682
    Abstract: A semiconductor device includes a semiconductor element, a lead, and a wire including a first bonding portion bonded to the semiconductor element and a second bonding portion bonded to the lead. The semiconductor element includes a first bonding surface which faces to a first side in a first direction and to which the first bonding portion is bonded. The lead includes a second bonding surface and a third bonding surface both facing to the first side in the first direction and forming an angle larger than 180° on the first side in the first direction. The semiconductor device further includes a ball bump extending onto both the second bonding surface and the third bonding surface. The second bonding portion is bonded to the lead via the ball bump.
    Type: Grant
    Filed: June 4, 2013
    Date of Patent: June 30, 2015
    Assignee: ROHM CO., LTD.
    Inventor: Hiroyuki Kaneda
  • Publication number: 20130334687
    Abstract: A semiconductor device includes a semiconductor element, a lead, and a wire including a first bonding portion bonded to the semiconductor element and a second bonding portion bonded to the lead. The semiconductor element includes a first bonding surface which faces to a first side in a first direction and to which the first bonding portion is bonded. The lead includes a second bonding surface and a third bonding surface both facing to the first side in the first direction and forming an angle larger than 180° on the first side in the first direction. The semiconductor device further includes a ball bump extending onto both the second bonding surface and the third bonding surface. The second bonding portion is bonded to the lead via the ball bump.
    Type: Application
    Filed: June 4, 2013
    Publication date: December 19, 2013
    Inventor: Hiroyuki KANEDA
  • Patent number: 7969897
    Abstract: A relay device for relaying transfer data to be transmitted between the devices has a plurality of testers. Each of the testers determines whether received transfer data is normal or not, and discards the transfer data that is determined abnormal. The relay device also has a counter that counts a number of transfer data discarded by each of the testers respectively, and a determiner that determines whether an operation of each tester is normal or not based on the number of discarded transfer data counted by the counter.
    Type: Grant
    Filed: November 26, 2008
    Date of Patent: June 28, 2011
    Assignee: Fujitsu Limited
    Inventors: Hiroshi Seki, Hiroyuki Kaneda, Masayuki Kanno, Akira Nakamizu, Syuuhei Ueno
  • Publication number: 20090147691
    Abstract: A relay device for relaying transfer data to be transmitted between the devices has a plurality of testers. Each of the testers determines whether received transfer data is normal or not, and discards the transfer data that is determined abnormal. The relay device also has a counter that counts a number of transfer data discarded by each of the testers respectively, and a determiner that determines whether an operation of each tester is normal or not based on the number of discarded transfer data counted by the counter.
    Type: Application
    Filed: November 26, 2008
    Publication date: June 11, 2009
    Applicant: FUJITSU LIMITED
    Inventors: Hiroshi SEKI, Hiroyuki Kaneda, Masayuki Kanno, Akira Nakamizu, Syuuhei Ueno
  • Patent number: 6124945
    Abstract: A color image is scanned in the matrix direction by the number of colors calculating unit and the number (A) of colors of different full color pixel values is counted. In this instance, each time the number (A) of colors is counted up, a pallet forming unit sequentially stores the full color pixel values as representative colors into entries and forms a subtractive color pallet. When the number (A) of colors exceeds the number (n) of entries of the subtractive color pallet, a transfer format discriminating unit counts the number (N) of transfer pixels up to the end of one-preceding row and compares a transfer data amount by a full color format with a transfer data amount by a pallet format in the number (N) of transfer pixels, thereby allowing the data transfer by the color format of a smaller one of the transfer data amounts to be executed by a data transfer unit.
    Type: Grant
    Filed: March 20, 1998
    Date of Patent: September 26, 2000
    Assignee: Fujitsu Limited
    Inventors: Kouki Ishihara, Takamitsu Aoki, Kouji Maeda, Masayuki Horii, Keizou Ueno, Kazuhiro Tamada, Eiichi Ebihara, Toshio Konaka, Hiroyuki Kaneda, Shigeyoshi Nakamura, Moriaki Sugimoto
  • Patent number: 6118463
    Abstract: An image forming apparatus includes a transport mechanism transporting a recording medium on a belt which is transported at a constant speed in a transport direction, a plurality of electrostatic recording units arranged in the transport direction of the recording medium and transferring toner images of different colors, a positional error detecting part using the toner image of a reference color transferred by one of the electrostatic recording units as a reference image, and relatively detecting positional error information related to positional errors of the toner images of remaining colors transferred by the remaining electrostatic recording units with respect to the reference image, and a positional error correcting part relatively correcting the positional errors of the toner images transferred by the remaining electrostatic recording units based on the positional error information.
    Type: Grant
    Filed: March 17, 1998
    Date of Patent: September 12, 2000
    Assignee: Fujitsu Limited
    Inventors: Youji Houki, Kouichi Kobayashi, Hiroji Uchimura, Morihisa Kawahara, Tsutomu Nagatomi, Hirofumi Nakayasu, Hiroyuki Kaneda, Takeo Kojima, Kazuhiro Tamada, Akihisa Sota, Masao Konisi, Takao Sugano, Yoshihiko Taira
  • Patent number: 6091513
    Abstract: A process discriminating unit allows an optimum converting process among a first magnification processing unit, a second magnification processing unit, a first reduction processing unit, a second reduction processing unit, and a third reduction processing unit to be executed on the basis of a conversion magnification (K), a resolution (D), and an image size. Particularly, each of the second magnification processing unit, first reduction processing unit, and second reduction processing unit magnifies an original image to a virtual image of a dot size obtained by magnifying a target image by 2 or 4 by an interpolation based on a simple repetition by a nearest neighborhood method and, after that, reduces to the target image in which the pixel value is obtained by averaging a plurality of pixels corresponding to one target pixel of the virtual image.
    Type: Grant
    Filed: April 10, 1998
    Date of Patent: July 18, 2000
    Assignee: Fujitsu Limited
    Inventors: Kouki Ishihara, Takamitsu Aoki, Kouji Maeda, Masayuki Horii, Keizou Ueno, Akihisa Sota, Kazuhiro Tamada, Eiichi Ebihara, Hiroshi Yoshimura, Hiroyuki Kaneda, Shigeyoshi Nakamura
  • Patent number: 5379326
    Abstract: A synchronization control circuit applicable to a TDMA (Time Division Multiple Access) digital mobile communication system for controlling the transmission and reception time base of a mobile station on which the circuit is mounted. The synchronization control circuit includes a plurality of time base counter circuits each counting down standard clock pulses to generate a plurality of timing pulse sequences having time bases which are respectively associated with the cells of the system. All the time base counter circuits share a single counter controller which controls the writing and reading of counts out of the time base counter circuits. The counter controller selectively produces the outputs of one of the time base counter circuits as a timing pulse sequence. The synchronization control circuit, therefore, is small size and light weight and saves power.
    Type: Grant
    Filed: April 27, 1992
    Date of Patent: January 3, 1995
    Assignee: NEC Corporation
    Inventors: Kenji Nakahara, Hiroyuki Kaneda
  • Patent number: 4889079
    Abstract: A cooling structure in a cylinder head of a water-cooled multicylinder engine has partitions disposed between cylinders and in a water jacket defined in the cylinder head, cooling inlet ports disposed on one side of plug insertion tubes extending vertically and disposed above substantially central portions of the cylinders and a cooling water discharge port disposed on the other side of the plug insertion tubes, and walls projecting from the partitions toward the plug insertion tubes. Each of the walls includes a lower projecting portion having a relatively small width near a wall of the cylinder head above a combustion chamber defined in each of the cylinders and an upper projecting portion having a relatively large width.
    Type: Grant
    Filed: November 14, 1988
    Date of Patent: December 26, 1989
    Assignee: Honda Giken Kogyo Kabushiki Kaisha
    Inventors: Akihiko Takeda, Hiroyuki Kaneda, Shigeru Suzuki