Patents by Inventor Hiroyuki Kaneda
Hiroyuki Kaneda has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11984924Abstract: A transmit/receive module includes plural duplexers, a power amplifier, and a sending transmission line. The plural duplexers operate in bands different from each other and each includes a transmit filter and a receive filter. The power amplifier amplifies signals of pass bands of the plural transmit filters and outputs the amplified signals. The sending transmission line is connected to the plural transmit filters. The signals of the pass bands of the plural transmit filters output from the power amplifier are transmitted through the sending transmission line.Type: GrantFiled: December 12, 2019Date of Patent: May 14, 2024Assignee: MURATA MANUFACTURING CO., LTD.Inventors: Seima Kondo, Satoshi Tanaka, Satoshi Arayashiki, Hiroyuki Furusato, Jin Yokoyama, Toru Yamaji, Akio Kaneda, Kiwamu Sakano, Junichi Yoshioka, Tatsuya Tsujiguchi, Atushi Ono
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Publication number: 20240149773Abstract: Disclosed is a seat including: sensors which includes a first cushion sensor provided at a seat cushion in a position corresponding to buttocks of an occupant, a second cushion sensor provided at the seat cushion and located farther frontward than the first cushion sensor, a first back sensor provided at a seat back and located in a lower position thereof, and a second back sensor provided at the seat back and located above the first back sensor; and a controller connected to the sensors and thereby allowed to acquire pressure values from the respective sensors. The controller is configured to identify the motion of the occupant based on outputs of at least two sensors of the first cushion sensor, the second cushion sensor, the first back sensor, and the second back sensor.Type: ApplicationFiled: January 9, 2024Publication date: May 9, 2024Inventors: Hiroyuki KAKU, Atsushi KUSANO, Hiroyuki NUMAJIRI, Satoshi FUJITA, Takako MIYOSHI, Munetaka KOWA, Ryuichiro HIROSE, Yoshikazu ITO, Yosuke HIGASHI, Satoshi SUZUKI, Ryosuke SATO, Kento UETAKE, Yasuharu OTSUKA, Satoru KANEDA
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Patent number: 11958385Abstract: A seat includes a seat body and a sensor configured to acquired information on an occupant seated on the seat body. The seat includes a coating as a location marker that marks a location of the sensor to render the location visually recognizable from outside the seat body.Type: GrantFiled: March 29, 2019Date of Patent: April 16, 2024Assignee: TS TECH CO., LTD.Inventors: Hiroyuki Kaku, Ryuichiro Hirose, Hiroyuki Numajiri, Satoshi Fujita, Takako Miyoshi, Munetaka Kowa, Atsushi Kusano, Yoshikazu Ito, Yousuke Higashi, Satoshi Suzuki, Ryosuke Sato, Kento Uetake, Yasuharu Otsuka, Satoru Kaneda
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Patent number: 11932147Abstract: Disclosed is a seat including: sensors which includes a first cushion sensor provided at a seat cushion in a position corresponding to buttocks of an occupant, a second cushion sensor provided at the seat cushion and located farther frontward than the first cushion sensor, a first back sensor provided at a seat back and located in a lower position thereof, and a second back sensor provided at the seat back and located above the first back sensor; and a controller connected to the sensors and thereby allowed to acquire pressure values from the respective sensors. The controller is configured to identify the motion of the occupant based on outputs of at least two sensors of the first cushion sensor, the second cushion sensor, the first back sensor, and the second back sensor.Type: GrantFiled: February 28, 2019Date of Patent: March 19, 2024Assignee: TS TECH CO., LTD.Inventors: Hiroyuki Kaku, Atsushi Kusano, Hiroyuki Numajiri, Satoshi Fujita, Takako Miyoshi, Munetaka Kowa, Ryuichiro Hirose, Yoshikazu Ito, Yosuke Higashi, Satoshi Suzuki, Ryosuke Sato, Kento Uetake, Yasuharu Otsuka, Satoru Kaneda
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Publication number: 20230207555Abstract: A semiconductor device includes a semiconductor substrate, an element region including an active element formed at the semiconductor substrate, a channel stopper formed in an outer peripheral region of the semiconductor substrate, and an insulating film that covers a surface of the semiconductor substrate and that has a first contact hole by which the channel stopper is exposed. The semiconductor device further includes a first field plate, a second field plate, and an equipotential ring electrode. The first field plate is formed on the insulating film, and faces the semiconductor substrate between the channel stopper and the element region through the insulating film. The second field plate is embedded in the insulating film, and faces the semiconductor substrate between the first field plate and the channel stopper through the insulating film. The equipotential ring electrode is formed along an outer peripheral region of the semiconductor substrate.Type: ApplicationFiled: March 6, 2023Publication date: June 29, 2023Inventor: Hiroyuki KANEDA
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Patent number: 11621260Abstract: A semiconductor device includes a semiconductor substrate, an element region including an active element formed at the semiconductor substrate, a channel stopper formed in an outer peripheral region of the semiconductor substrate, and an insulating film that covers a surface of the semiconductor substrate and that has a first contact hole by which the channel stopper is exposed. The semiconductor device further includes a first field plate, a second field plate, and an equipotential ring electrode. The first field plate is formed on the insulating film, and faces the semiconductor substrate between the channel stopper and the element region through the insulating film. The second field plate is embedded in the insulating film, and faces the semiconductor substrate between the first field plate and the channel stopper through the insulating film. The equipotential ring electrode is formed along an outer peripheral region of the semiconductor substrate.Type: GrantFiled: May 8, 2020Date of Patent: April 4, 2023Assignee: ROHM CO., LTD.Inventor: Hiroyuki Kaneda
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Publication number: 20200273854Abstract: A semiconductor device includes a semiconductor substrate, an element region including an active element formed at the semiconductor substrate, a channel stopper formed in an outer peripheral region of the semiconductor substrate, and an insulating film that covers a surface of the semiconductor substrate and that has a first contact hole by which the channel stopper is exposed. The semiconductor device further includes a first field plate, a second field plate, and an equipotential ring electrode. The first field plate is formed on the insulating film, and faces the semiconductor substrate between the channel stopper and the element region through the insulating film. The second field plate is embedded in the insulating film, and faces the semiconductor substrate between the first field plate and the channel stopper through the insulating film. The equipotential ring electrode is formed along an outer peripheral region of the semiconductor substrate.Type: ApplicationFiled: May 8, 2020Publication date: August 27, 2020Inventor: Hiroyuki KANEDA
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Patent number: 10692850Abstract: A semiconductor device includes a semiconductor substrate, an element region including an active element formed at the semiconductor substrate, a channel stopper formed in an outer peripheral region of the semiconductor substrate, and an insulating film that covers a surface of the semiconductor substrate and that has a first contact hole by which the channel stopper is exposed. The semiconductor device further includes a first field plate, a second field plate, and an equipotential ring electrode. The first field plate is formed on the insulating film, and faces the semiconductor substrate between the channel stopper and the element region through the insulating film. The second field plate is embedded in the insulating film, and faces the semiconductor substrate between the first field plate and the channel stopper through the insulating film. The equipotential ring electrode is formed along an outer peripheral region of the semiconductor substrate.Type: GrantFiled: April 25, 2017Date of Patent: June 23, 2020Assignee: ROHM CO., LTD.Inventor: Hiroyuki Kaneda
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Publication number: 20170317068Abstract: A semiconductor device includes a semiconductor substrate, an element region including an active element formed at the semiconductor substrate, a channel stopper formed in an outer peripheral region of the semiconductor substrate, and an insulating film that covers a surface of the semiconductor substrate and that has a first contact hole by which the channel stopper is exposed. The semiconductor device further includes a first field plate, a second field plate, and an equipotential ring electrode. The first field plate is formed on the insulating film, and faces the semiconductor substrate between the channel stopper and the element region through the insulating film. The second field plate is embedded in the insulating film, and faces the semiconductor substrate between the first field plate and the channel stopper through the insulating film. The equipotential ring electrode is formed along an outer peripheral region of the semiconductor substrate.Type: ApplicationFiled: April 25, 2017Publication date: November 2, 2017Inventor: Hiroyuki KANEDA
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Patent number: 9536859Abstract: A semiconductor device includes a semiconductor element, a lead, and a wire including a first bonding portion bonded to the semiconductor element and a second bonding portion bonded to the lead. The semiconductor element includes a first bonding surface which faces to a first side in a first direction and to which the first bonding portion is bonded. The lead includes a second bonding surface and a third bonding surface both facing to the first side in the first direction and forming an angle larger than 180° on the first side in the first direction. The semiconductor device further includes a ball bump extending onto both the second bonding surface and the third bonding surface. The second bonding portion is bonded to the lead via the ball bump.Type: GrantFiled: May 26, 2015Date of Patent: January 3, 2017Assignee: ROHM CO., LTD.Inventor: Hiroyuki Kaneda
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Publication number: 20150255425Abstract: A semiconductor device includes a semiconductor element, a lead, and a wire including a first bonding portion bonded to the semiconductor element and a second bonding portion bonded to the lead. The semiconductor element includes a first bonding surface which faces to a first side in a first direction and to which the first bonding portion is bonded. The lead includes a second bonding surface and a third bonding surface both facing to the first side in the first direction and forming an angle larger than 180° on the first side in the first direction. The semiconductor device further includes a ball bump extending onto both the second bonding surface and the third bonding surface. The second bonding portion is bonded to the lead via the ball bump.Type: ApplicationFiled: May 26, 2015Publication date: September 10, 2015Inventor: Hiroyuki KANEDA
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Patent number: 9070682Abstract: A semiconductor device includes a semiconductor element, a lead, and a wire including a first bonding portion bonded to the semiconductor element and a second bonding portion bonded to the lead. The semiconductor element includes a first bonding surface which faces to a first side in a first direction and to which the first bonding portion is bonded. The lead includes a second bonding surface and a third bonding surface both facing to the first side in the first direction and forming an angle larger than 180° on the first side in the first direction. The semiconductor device further includes a ball bump extending onto both the second bonding surface and the third bonding surface. The second bonding portion is bonded to the lead via the ball bump.Type: GrantFiled: June 4, 2013Date of Patent: June 30, 2015Assignee: ROHM CO., LTD.Inventor: Hiroyuki Kaneda
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Publication number: 20130334687Abstract: A semiconductor device includes a semiconductor element, a lead, and a wire including a first bonding portion bonded to the semiconductor element and a second bonding portion bonded to the lead. The semiconductor element includes a first bonding surface which faces to a first side in a first direction and to which the first bonding portion is bonded. The lead includes a second bonding surface and a third bonding surface both facing to the first side in the first direction and forming an angle larger than 180° on the first side in the first direction. The semiconductor device further includes a ball bump extending onto both the second bonding surface and the third bonding surface. The second bonding portion is bonded to the lead via the ball bump.Type: ApplicationFiled: June 4, 2013Publication date: December 19, 2013Inventor: Hiroyuki KANEDA
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Patent number: 7969897Abstract: A relay device for relaying transfer data to be transmitted between the devices has a plurality of testers. Each of the testers determines whether received transfer data is normal or not, and discards the transfer data that is determined abnormal. The relay device also has a counter that counts a number of transfer data discarded by each of the testers respectively, and a determiner that determines whether an operation of each tester is normal or not based on the number of discarded transfer data counted by the counter.Type: GrantFiled: November 26, 2008Date of Patent: June 28, 2011Assignee: Fujitsu LimitedInventors: Hiroshi Seki, Hiroyuki Kaneda, Masayuki Kanno, Akira Nakamizu, Syuuhei Ueno
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Publication number: 20090147691Abstract: A relay device for relaying transfer data to be transmitted between the devices has a plurality of testers. Each of the testers determines whether received transfer data is normal or not, and discards the transfer data that is determined abnormal. The relay device also has a counter that counts a number of transfer data discarded by each of the testers respectively, and a determiner that determines whether an operation of each tester is normal or not based on the number of discarded transfer data counted by the counter.Type: ApplicationFiled: November 26, 2008Publication date: June 11, 2009Applicant: FUJITSU LIMITEDInventors: Hiroshi SEKI, Hiroyuki Kaneda, Masayuki Kanno, Akira Nakamizu, Syuuhei Ueno
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Patent number: 6124945Abstract: A color image is scanned in the matrix direction by the number of colors calculating unit and the number (A) of colors of different full color pixel values is counted. In this instance, each time the number (A) of colors is counted up, a pallet forming unit sequentially stores the full color pixel values as representative colors into entries and forms a subtractive color pallet. When the number (A) of colors exceeds the number (n) of entries of the subtractive color pallet, a transfer format discriminating unit counts the number (N) of transfer pixels up to the end of one-preceding row and compares a transfer data amount by a full color format with a transfer data amount by a pallet format in the number (N) of transfer pixels, thereby allowing the data transfer by the color format of a smaller one of the transfer data amounts to be executed by a data transfer unit.Type: GrantFiled: March 20, 1998Date of Patent: September 26, 2000Assignee: Fujitsu LimitedInventors: Kouki Ishihara, Takamitsu Aoki, Kouji Maeda, Masayuki Horii, Keizou Ueno, Kazuhiro Tamada, Eiichi Ebihara, Toshio Konaka, Hiroyuki Kaneda, Shigeyoshi Nakamura, Moriaki Sugimoto
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Patent number: 6118463Abstract: An image forming apparatus includes a transport mechanism transporting a recording medium on a belt which is transported at a constant speed in a transport direction, a plurality of electrostatic recording units arranged in the transport direction of the recording medium and transferring toner images of different colors, a positional error detecting part using the toner image of a reference color transferred by one of the electrostatic recording units as a reference image, and relatively detecting positional error information related to positional errors of the toner images of remaining colors transferred by the remaining electrostatic recording units with respect to the reference image, and a positional error correcting part relatively correcting the positional errors of the toner images transferred by the remaining electrostatic recording units based on the positional error information.Type: GrantFiled: March 17, 1998Date of Patent: September 12, 2000Assignee: Fujitsu LimitedInventors: Youji Houki, Kouichi Kobayashi, Hiroji Uchimura, Morihisa Kawahara, Tsutomu Nagatomi, Hirofumi Nakayasu, Hiroyuki Kaneda, Takeo Kojima, Kazuhiro Tamada, Akihisa Sota, Masao Konisi, Takao Sugano, Yoshihiko Taira
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Patent number: 6091513Abstract: A process discriminating unit allows an optimum converting process among a first magnification processing unit, a second magnification processing unit, a first reduction processing unit, a second reduction processing unit, and a third reduction processing unit to be executed on the basis of a conversion magnification (K), a resolution (D), and an image size. Particularly, each of the second magnification processing unit, first reduction processing unit, and second reduction processing unit magnifies an original image to a virtual image of a dot size obtained by magnifying a target image by 2 or 4 by an interpolation based on a simple repetition by a nearest neighborhood method and, after that, reduces to the target image in which the pixel value is obtained by averaging a plurality of pixels corresponding to one target pixel of the virtual image.Type: GrantFiled: April 10, 1998Date of Patent: July 18, 2000Assignee: Fujitsu LimitedInventors: Kouki Ishihara, Takamitsu Aoki, Kouji Maeda, Masayuki Horii, Keizou Ueno, Akihisa Sota, Kazuhiro Tamada, Eiichi Ebihara, Hiroshi Yoshimura, Hiroyuki Kaneda, Shigeyoshi Nakamura
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Patent number: 5379326Abstract: A synchronization control circuit applicable to a TDMA (Time Division Multiple Access) digital mobile communication system for controlling the transmission and reception time base of a mobile station on which the circuit is mounted. The synchronization control circuit includes a plurality of time base counter circuits each counting down standard clock pulses to generate a plurality of timing pulse sequences having time bases which are respectively associated with the cells of the system. All the time base counter circuits share a single counter controller which controls the writing and reading of counts out of the time base counter circuits. The counter controller selectively produces the outputs of one of the time base counter circuits as a timing pulse sequence. The synchronization control circuit, therefore, is small size and light weight and saves power.Type: GrantFiled: April 27, 1992Date of Patent: January 3, 1995Assignee: NEC CorporationInventors: Kenji Nakahara, Hiroyuki Kaneda
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Patent number: 4889079Abstract: A cooling structure in a cylinder head of a water-cooled multicylinder engine has partitions disposed between cylinders and in a water jacket defined in the cylinder head, cooling inlet ports disposed on one side of plug insertion tubes extending vertically and disposed above substantially central portions of the cylinders and a cooling water discharge port disposed on the other side of the plug insertion tubes, and walls projecting from the partitions toward the plug insertion tubes. Each of the walls includes a lower projecting portion having a relatively small width near a wall of the cylinder head above a combustion chamber defined in each of the cylinders and an upper projecting portion having a relatively large width.Type: GrantFiled: November 14, 1988Date of Patent: December 26, 1989Assignee: Honda Giken Kogyo Kabushiki KaishaInventors: Akihiko Takeda, Hiroyuki Kaneda, Shigeru Suzuki