Patents by Inventor Hiroyuki Kitabayashi

Hiroyuki Kitabayashi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10056247
    Abstract: In accordance with the following step of a method of manufacturing a MOSFET, a first cutting step of cutting a silicon carbide wafer along a plane substantially parallel to a {11-20} plane is performed. After the first cutting step, a second cutting step of cutting the silicon carbide wafer along a plane substantially perpendicular to the {11-20} plane and substantially perpendicular to the first main surface is performed.
    Type: Grant
    Filed: October 7, 2015
    Date of Patent: August 21, 2018
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Mitsuhiko Sakai, Hiroyuki Kitabayashi
  • Publication number: 20170338100
    Abstract: In accordance with the following step of a method of manufacturing a MOSFET, a first cutting step of cutting a silicon carbide wafer along a plane substantially parallel to a {11-20} plane is performed. After the first cutting step, a second cutting step of cutting the silicon carbide wafer along a plane substantially perpendicular to the {11-20} plane and substantially perpendicular to the first main surface is performed.
    Type: Application
    Filed: October 7, 2015
    Publication date: November 23, 2017
    Inventors: Mitsuhiko Sakai, Hiroyuki Kitabayashi
  • Patent number: 9646834
    Abstract: There are prepared a semiconductor substrate having a first main surface and a second main surface, and an adhesive tape having a third main surface and a fourth main surface, the first main surface having a maximum diameter of not less than 100 mm. The semiconductor substrate fixed to the third main surface of the adhesive tape is placed in an accommodation chamber. The accommodation chamber is evacuated while maintaining a temperature of the adhesive tape at not less than 100° C. An electrode is formed on the second main surface after the step of reducing the temperature of the semiconductor substrate. The step of evacuating the accommodation chamber includes a step of evacuating the accommodation chamber while maintaining the temperature of the adhesive tape at not less than 100° C. with a space being provided between the fourth main surface of the adhesive tape and the substrate holding unit.
    Type: Grant
    Filed: October 21, 2014
    Date of Patent: May 9, 2017
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventor: Hiroyuki Kitabayashi
  • Publication number: 20170018429
    Abstract: There are prepared a semiconductor substrate having a first main surface and a second main surface, and an adhesive tape having a third main surface and a fourth main surface, the first main surface having a maximum diameter of not less than 100 mm. The semiconductor substrate fixed to the third main surface of the adhesive tape is placed in an accommodation chamber. The accommodation chamber is evacuated while maintaining a temperature of the adhesive tape at not less than 100° C. An electrode is formed on the second main surface after the step of reducing the temperature of the semiconductor substrate. The step of evacuating the accommodation chamber includes a step of evacuating the accommodation chamber while maintaining the temperature of the adhesive tape at not less than 100° C. with a space being provided between the fourth main surface of the adhesive tape and the substrate holding unit.
    Type: Application
    Filed: October 21, 2014
    Publication date: January 19, 2017
    Inventor: Hiroyuki KITABAYASHI
  • Patent number: 9543154
    Abstract: A method for manufacturing a semiconductor device includes the following steps. A semiconductor substrate is prepared which has a first main surface and a second main surface opposite to each other. The semiconductor substrate is fixed on an adhesive tape at the first main surface. The semiconductor substrate fixed on the adhesive tape is placed in an accommodating chamber. While maintaining a temperature of the adhesive tape at 100° C. or more, a gas is exhausted from the accommodating chamber. After the step of exhausting the gas from the accommodating chamber, a temperature of the semiconductor substrate is reduced. After the step of reducing the temperature of the semiconductor substrate, an electrode is formed on a second main surface of the semiconductor substrate. In this way, there can be provided a method for manufacturing a semiconductor device so as to achieve reduced contact resistance between a semiconductor substrate and an electrode.
    Type: Grant
    Filed: May 9, 2013
    Date of Patent: January 10, 2017
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventor: Hiroyuki Kitabayashi
  • Patent number: 9449823
    Abstract: In a state where a silicon carbide substrate having a first main surface and second main surface opposite to each other is fixed to a base material having a higher flexibility than the silicon carbide substrate, silicon carbide on a side of second main surface of silicon carbide substrate is removed, and an electrode is formed on the second main surface. The base material has an area which is smaller than or equal to an area of the first main surface of the silicon carbide substrate. In the step of fixing silicon carbide substrate to the base material, the base material is arranged at a position of covering a center of the first main surface so that the base material does not extend beyond an outer circumference of the first main surface.
    Type: Grant
    Filed: December 6, 2013
    Date of Patent: September 20, 2016
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventor: Hiroyuki Kitabayashi
  • Patent number: 9384981
    Abstract: A method of manufacturing a silicon carbide semiconductor device includes the steps of preparing a silicon carbide substrate, forming a first electrode on the silicon carbide substrate, establishing ohmic contact between the silicon carbide substrate and the first electrode by irradiating the first electrode with laser beams, and forming a second electrode on the first electrode. In the step of establishing ohmic contact, a surface of the first electrode is irradiated with laser beams such that arithmetic mean roughness of a surface of the second electrode is not greater than 0.2 ?m.
    Type: Grant
    Filed: July 8, 2015
    Date of Patent: July 5, 2016
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Hideto Tamaso, Hiroyuki Kitabayashi, Keiji Wada
  • Patent number: 9331164
    Abstract: A silicon carbide semiconductor device includes: a silicon carbide semiconductor layer; and an electrode layer in contact with the silicon carbide semiconductor layer. In a case where the electrode layer is equally divided into two in a thickness direction in one cross section of the electrode layer in the thickness direction to obtain a first region facing the silicon carbide semiconductor layer and a second region opposite to the silicon carbide semiconductor layer, an area of a carbon portion containing the carbon in the first region is wider than an area of the carbon portion in the second region. At an interface region located up to 300 nm from an interface between the silicon carbide semiconductor layer and the electrode layer, the carbon portion includes a plurality of portions disposed with a space interposed therebetween, and a ratio of area occupied by the carbon portion is not more than 40%.
    Type: Grant
    Filed: July 8, 2015
    Date of Patent: May 3, 2016
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventor: Hiroyuki Kitabayashi
  • Patent number: 9330916
    Abstract: A silicon carbide substrate having a first main surface and a second main surface opposite to the first main surface is prepared. A surface electrode is formed in contact with the first main surface of the silicon carbide substrate. An adhesive tape is adhered to the surface electrode so as to cover the surface electrode. The silicon carbide substrate is heated at a first pressure lower than atmospheric pressure, with the adhesive tape being adhered to the surface electrode. After the silicon carbide substrate is heated, the second main surface of the silicon carbide substrate is ground. After the second main surface is ground, the second main surface of the silicon carbide substrate is processed at a second pressure lower than atmospheric pressure, with the adhesive tape being adhered to the surface electrode.
    Type: Grant
    Filed: April 29, 2015
    Date of Patent: May 3, 2016
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventor: Hiroyuki Kitabayashi
  • Publication number: 20160056257
    Abstract: A silicon carbide semiconductor device includes: a silicon carbide semiconductor layer; and an electrode layer in contact with the silicon carbide semiconductor layer. In a case where the electrode layer is equally divided into two in a thickness direction in one cross section of the electrode layer in the thickness direction to obtain a first region facing the silicon carbide semiconductor layer and a second region opposite to the silicon carbide semiconductor layer, an area of a carbon portion containing the carbon in the first region is wider than an area of the carbon portion in the second region. At an interface region located up to 300 nm from an interface between the silicon carbide semiconductor layer and the electrode layer, the carbon portion includes a plurality of portions disposed with a space interposed therebetween, and a ratio of area occupied by the carbon portion is not more than 40%.
    Type: Application
    Filed: July 8, 2015
    Publication date: February 25, 2016
    Inventor: Hiroyuki Kitabayashi
  • Publication number: 20160056041
    Abstract: A method of manufacturing a silicon carbide semiconductor device includes the steps of preparing a silicon carbide substrate, forming a first electrode on the silicon carbide substrate, establishing ohmic contact between the silicon carbide substrate and the first electrode by irradiating the first electrode with laser beams, and forming a second electrode on the first electrode. In the step of establishing ohmic contact, a surface of the first electrode is irradiated with laser beams such that arithmetic mean roughness of a surface of the second electrode is not greater than 0.2 ?m.
    Type: Application
    Filed: July 8, 2015
    Publication date: February 25, 2016
    Inventors: Hideto TAMASO, Hiroyuki KITABAYASHI, Keiji WADA
  • Publication number: 20150371856
    Abstract: A silicon carbide substrate having a first main surface and a second main surface opposite to the first main surface is prepared. A surface electrode is formed in contact with the first main surface of the silicon carbide substrate. An adhesive tape is adhered to the surface electrode so as to cover the surface electrode. The silicon carbide substrate is heated at a first pressure lower than atmospheric pressure, with the adhesive tape being adhered to the surface electrode. After the silicon carbide substrate is heated, the second main surface of the silicon carbide substrate is ground. After the second main surface is ground, the second main surface of the silicon carbide substrate is processed at a second pressure lower than atmospheric pressure, with the adhesive tape being adhered to the surface electrode.
    Type: Application
    Filed: April 29, 2015
    Publication date: December 24, 2015
    Inventor: Hiroyuki KITABAYASHI
  • Publication number: 20150287597
    Abstract: In a state where a silicon carbide substrate having a first main surface and second main surface opposite to each other is fixed to a base material having a higher flexibility than the silicon carbide substrate, silicon carbide on a side of second main surface of silicon carbide substrate is removed, and an electrode is formed on the second main surface. The base material has an area which is smaller than or equal to an area of the first main surface of the silicon carbide substrate. In the step of fixing silicon carbide substrate to the base material, the base material is arranged at a position of covering a center of the first main surface so that the base material does not extend beyond an outer circumference of the first main surface.
    Type: Application
    Filed: December 6, 2013
    Publication date: October 8, 2015
    Inventor: Hiroyuki Kitabayashi
  • Patent number: 8916462
    Abstract: A method for manufacturing a MOSFET includes the steps of: preparing a substrate made of silicon carbide; forming a drain electrode making ohmic contact with the substrate; and forming a backside pad electrode on and in contact with the drain electrode. The drain electrode formed in the step of forming the drain electrode is made of an alloy containing Ti and Si. Further, the backside pad electrode formed is maintained at a temperature of 300° C. or smaller until completion of the MOSFET. Accordingly, the manufacturing process can be efficient while achieving excellent adhesion between the electrodes.
    Type: Grant
    Filed: September 11, 2012
    Date of Patent: December 23, 2014
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Hiroyuki Kitabayashi, Hideto Tamaso, Taku Horii
  • Publication number: 20140004696
    Abstract: A method for manufacturing a semiconductor device includes the following steps. A semiconductor substrate is prepared which has a first main surface and a second main surface opposite to each other. The semiconductor substrate is fixed on an adhesive tape at the first main surface. The semiconductor substrate fixed on the adhesive tape is placed in an accommodating chamber. While maintaining a temperature of the adhesive tape at 100° C. or more, a gas is exhausted from the accommodating chamber. After the step of exhausting the gas from the accommodating chamber, a temperature of the semiconductor substrate is reduced. After the step of reducing the temperature of the semiconductor substrate, an electrode is formed on a second main surface of the semiconductor substrate. In this way, there can be provided a method for manufacturing a semiconductor device so as to achieve reduced contact resistance between a semiconductor substrate and an electrode.
    Type: Application
    Filed: May 9, 2013
    Publication date: January 2, 2014
    Applicant: Sumitomo Electric Industries, Ltd.
    Inventor: Hiroyuki Kitabayashi
  • Publication number: 20130143398
    Abstract: A method for manufacturing a MOSFET includes the steps of: preparing a substrate made of silicon carbide; forming a drain electrode making ohmic contact with the substrate; and forming a backside pad electrode on and in contact with the drain electrode. The drain electrode formed in the step of forming the drain electrode is made of an alloy containing Ti and Si. Further, the backside pad electrode formed is maintained at a temperature of 300° C. or smaller until completion of the MOSFET. Accordingly, the manufacturing process can be efficient while achieving excellent adhesion between the electrodes.
    Type: Application
    Filed: September 11, 2012
    Publication date: June 6, 2013
    Applicant: Sumitomo Electric Industries, Ltd.
    Inventors: Hiroyuki Kitabayashi, Hideto Tamaso, Taku Horii
  • Publication number: 20130017671
    Abstract: A method for manufacturing a semiconductor device includes the steps of: preparing a substrate having a region that at least includes one main surface thereof and that is made of single-crystal silicon carbide; forming an active layer on the one main surface; grinding a region including the other main surface of the substrate opposite to the one main surface; removing a damaged layer formed in the step of grinding the region including the other main surface; and forming a backside electrode in contact with the main surface exposed by the removal of the damaged layer. The one main surface has an off angle of not less than 50° and not more than 65° relative to a {0001} plane.
    Type: Application
    Filed: July 12, 2012
    Publication date: January 17, 2013
    Applicant: Sumitomo Electric Industries, Ltd.
    Inventors: Hiroyuki KITABAYASHI, Taku HORII
  • Patent number: 8227279
    Abstract: A method of manufacturing a semiconductor element of good characteristics at a reduced manufacturing cost is provided. The manufacturing method of the semiconductor element includes a GaN-containing semiconductor layer forming step, an electrode layer forming step, a step of forming an Al film on the GaN-containing semiconductor layer, a step of forming a mask layer made of a material of which etching rate is smaller than that of a material of the Al film, a step of forming a ridge portion using the mask layer as a mask, a step of retreating a position of a side wall of the Al film with respect to a position of a side wall of the mask layer, a step of forming, on the side surface of the ridge portion and the top surface of the mask layer, a protective film made of a material of which etching rate is smaller than that of the material forming the Al film, and a step of removing the Al film and thereby removing the mask layer and a portion of the protective film formed on the top surface of the mask layer.
    Type: Grant
    Filed: August 11, 2009
    Date of Patent: July 24, 2012
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Koji Katayama, Hiroyuki Kitabayashi, Satoshi Arakawa
  • Publication number: 20110129997
    Abstract: A method for manufacturing a semiconductor device according to the present invention includes the following step: a step (S10) of forming a GaN-based semiconductor layer, a step (S20) of forming an Al film on the GaN-based semiconductor layer, a step (S30, S40) of forming a mask layer composed of a material having a lower etching rate than that of the material constituting the Al film, a step (S50) of partially removing the Al film and the GaN-based semiconductor layer using the mask layer as a mask to form a ridge portion, a step (S60) of retracting the positions of the side walls at the ends of the Al film from the positions of the side walls of the mask layer, a step (S70) of forming a protection film composed of a material having a lower etching rate than that of the material constituting the Al film on the side surfaces of the ridge portion and on the upper surface of the mask layer, and a step (S80) of removing the Al film to remove the mask layer and the protection film formed on the upper surface of t
    Type: Application
    Filed: February 7, 2011
    Publication date: June 2, 2011
    Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Hiroyuki KITABAYASHI, Koji KATAYAMA, Satoshi ARAKAWA
  • Publication number: 20110062466
    Abstract: Affords AlxGa(1-x)As (0?x?1) substrates epitaxial wafers for infrared LEDs, infrared LEDs, methods of manufacturing AlxGa(1-x)As substrates, methods of manufacturing epitaxial wafers for infrared LEDs, and methods of manufacturing infrared LEDs, whereby a high level of transmissivity is maintained, and through which, in the fabrication of semiconductor devices, the devices prove to have superior light output characteristics. An AlxGa(1-x)As substrate (10a) as disclosed is an AlxGa(1-x)As substrate (10a) furnished with an AlxGa(1-x)As layer (11) having a major surface (11a) and, on the reverse side from the major surface (11a), a rear face (11b), and is characterized in that in the AlxGa(1-x)As layer (11), the amount fraction x of Al in the rear face (11b) is greater the amount fraction x of Al in the major surface (11a). The AlxGa(1-x)As substrate (10a) may additionally be provided with a GaAs substrate (13), contacting the rear face (11b) of the AlxGa(1-x)As layer (11).
    Type: Application
    Filed: May 27, 2009
    Publication date: March 17, 2011
    Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: So Tanaka, Kenichi Miyahara, Hiroyuki Kitabayashi, Koji Katayama, Tomonori Morishita, Tatsuya Moriwake