Patents by Inventor Hiroyuki Kiyanagi

Hiroyuki Kiyanagi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8467823
    Abstract: A method of communicating between a base band unit and a plurality of remote radio heads includes the steps of receiving a first signal through an antenna in a first remote radio head, transmitting the first signal to a second remote radio head through a digital radio interface, receiving a second signal through an antenna in the second remote radio head, compensating for a delay accrued in the first signal, adding the first signal and the second signal to obtain a resulting signal, and transmitting the resulting signal to a base band unit through a digital radio interface.
    Type: Grant
    Filed: March 24, 2010
    Date of Patent: June 18, 2013
    Assignee: Fujitsu Limited
    Inventors: Hiroyuki Seki, Hiroyuki Kiyanagi, Wei-Peng Chen, Chenxi Zhu, Nien-Tai Kai Mao
  • Publication number: 20110237178
    Abstract: A method of communicating between a base band unit and a plurality of remote radio heads includes the steps of receiving a first signal through an antenna in a first remote radio head, transmitting the first signal to a second remote radio head through a digital radio interface, receiving a second signal through an antenna in the second remote radio head, compensating for a delay accrued in the first signal, adding the first signal and the second signal to obtain a resulting signal, and transmitting the resulting signal to a base band unit through a digital radio interface.
    Type: Application
    Filed: March 24, 2010
    Publication date: September 29, 2011
    Applicant: FUJITSU NETWORK COMMUNICATIONS, INC.
    Inventors: Hiroyuki Seki, Hiroyuki Kiyanagi, Wei-Peng Chen, Chenxi Zhu, Nien-Tai Kai Mao
  • Patent number: 6871053
    Abstract: A wireless communication apparatus according to the present invention is composed of a first section for carrying out wireless communication with a multichannel signal and a second section having a plurality of channel units each process a predetermined frequency signal as a channel signal. The wireless communication apparatus is arranged to have a plurality of variable attenuators each provided for corresponding one of the channel signals received from each channel unit of the second section, a combiner for combining outputs from the respective variable attenuators together and outputting the resultant combined signal to the first section, and a control unit for controlling the degree of attenuation of the individual variable attenuators according to the variation of the number of the channel signals.
    Type: Grant
    Filed: January 24, 2001
    Date of Patent: March 22, 2005
    Assignee: Fujitsu Limited
    Inventors: Yasuhiro Shibuya, Koji Hirai, Hiroyuki Kiyanagi
  • Patent number: 6792255
    Abstract: A wireless communication apparatus according to the present invention is composed of a first section for carrying out wireless communication with a multichannel signal and a second section having a plurality of channel units each process a predetermined frequency signal as a channel signal. The wireless communication apparatus is arranged to have a plurality of variable attenuators each provided for corresponding one of the channel signals received from each channel unit of the second section, a combiner for combining outputs from the respective variable attenuators together and outputting the resultant combined signal to the first section, and a control unit for controlling the degree of attenuation of the individual variable attenuators according to the variation of the number of the channel signals.
    Type: Grant
    Filed: January 24, 2001
    Date of Patent: September 14, 2004
    Assignee: Fujitsu Limited
    Inventors: Yasuhiro Shibuya, Koji Hirai, Hiroyuki Kiyanagi
  • Patent number: 6731704
    Abstract: In a cross polarization interference eliminating apparatus, a signal demodulating section receives a first signal resulting from one of radio signals, which are transmitted in a modulated, decoded and equalized form from respectively using two kinds of polarized plain waves intercrossing at right angles in a common frequency band, and analog-to-digital converts, demodulates and equalizes the received first signal to output a first baseband signal, and an interference eliminating section receives a second signal resulting from the other radio signal, analog-to-digital converts the received digital signal to obtain a digital signal, delays the obtained digital signal. And an adding section adds the second baseband signal from the interference eliminator to the first baseband signal from the signal demodulator to output a composite signal.
    Type: Grant
    Filed: June 1, 2000
    Date of Patent: May 4, 2004
    Assignee: Fujitsu Limited
    Inventor: Hiroyuki Kiyanagi
  • Publication number: 20020016158
    Abstract: A wireless communication apparatus according to the present invention is composed of a first section for carrying out wireless communication with a multichannel signal and a second section having a plurality of channel units each process a predetermined frequency signal as a channel signal. The wireless communication apparatus is arranged to have a plurality of variable attenuators each provided for corresponding one of the channel signals received from each channel unit of the second section, a combiner for combining outputs from the respective variable attenuators together and outputting the resultant combined signal to the first section, and a control unit for controlling the degree of attenuation of the individual variable attenuators according to the variation of the number of the channel signals.
    Type: Application
    Filed: January 24, 2001
    Publication date: February 7, 2002
    Applicant: FUJITSU LIMITED
    Inventors: Yasuhiro Shibuya, Koji Hirai, Hiroyuki Kiyanagi
  • Patent number: 6320734
    Abstract: A communication device includes a number of transmitter/receiver/modem blocks installed in vertical positions. Each of the transmitter/receiver/modem blocks includes a supporting board having a front surface and a back surface, the supporting board including a plurality of fins on the front surface and a plurality of forced air-cooling fans on the supporting board. A front cover encloses the front surface of the supporting board, the front cover and the fins forming a plurality of ducts, the front cover and the front surface forming an internal opening under the fins. A back cover encloses the back surface of the supporting board. First heat-radiating circuit modules are provided at positions adjacent to the fins on the front surface. A second heat-radiating circuit module is provided within the opening.
    Type: Grant
    Filed: April 7, 1999
    Date of Patent: November 20, 2001
    Assignee: Fujitsu Limited
    Inventors: Hideki Sonobe, Yasuo Iwahashi, Masayuki Watabe, Toshiaki Suzuki, Hiroyuki Kiyanagi, Yasuhiro Shibuya
  • Patent number: 6185201
    Abstract: The present invention is directed to a multiplex radio transmission/receiving system. The system includes a plurality of transmission sections provided so as to correspond to a plurality of channels, and a plurality of receiving sections provided so as to correspond to the plurality of channels. Each transmission section includes a modulation section, a first frequency conversion section, a first band-pass filter, a second frequency conversion section, and a second band-pass filter. Each receiving section includes a third band-pass filter, a third frequency conversion section, a fourth band-pass filter, a fourth frequency conversion section, and a demodulation section. By selection of an optimum value for a second intermediate frequency of a transmitter and for a third intermediate frequency of a receiver, a group of transmission radio frequencies (RF) signals and a group of local frequency signals are allocated without overlap.
    Type: Grant
    Filed: November 6, 1998
    Date of Patent: February 6, 2001
    Assignee: Fujitsu Limited
    Inventors: Hiroyuki Kiyanagi, Toshiaki Suzuki, Yasuhiro Shibuya, Hiroshi Suzuki
  • Patent number: 6028902
    Abstract: A clock phase detecting circuit is provided which is arranged in a receiving section of a multiplex radio apparatus. Difference detecting unit detects the difference between input and output signals to and from an equalizing circuit, and squaring unit squares the detected difference. The squared value thus obtained shows a minimum value when the phase of a clock signal output from a clock regenerating circuit coincides with a normal position of signal point. Therefore, phase adjusting unit outputs a control signal to the clock regenerating circuit while monitoring the squared value, to adjust the phase of the clock signal output from the clock regenerating circuit so that the squared value output from the squaring unit may be minimized.
    Type: Grant
    Filed: March 28, 1997
    Date of Patent: February 22, 2000
    Assignee: Fujitsu Limited
    Inventors: Hiroyuki Kiyanagi, Mitsuo Kakuishi, Takanori Iwamatsu
  • Patent number: 6029056
    Abstract: A space diversity receiver apparatus receives signals by two spatially separated antennas, controls the phase of the signal received by one of the antennas by a phase control circuit, combines the phase-controlled signal and the signal received by the other antenna by a combiner and outputs the combined signal. A digital detector digitally detects the center frequency level and the levels on high- and low-frequency sides of the center frequency of the combined signal. Phase is controlled in such a manner that the center frequency level will coincide with a set level and a deviation between the levels on the high- and low-frequency sides of the center frequency will become zero.
    Type: Grant
    Filed: October 31, 1997
    Date of Patent: February 22, 2000
    Assignee: Fujitsu Limited
    Inventors: Hiroyuki Kiyanagi, Yasuhiro Shibuya, Takanori Iwamatsu, Toshiaki Suzuki
  • Patent number: 5987078
    Abstract: A carrier regenerating circuit used for a demodulator which demodulates many-valued orthogonal amplitude modulation signals. The carrier regenerating circuit consists of a first PLL (phase-locked loop) section, including a detector for detecting an intermediate-frequency signal using a local oscillator, a phase error detecting section and a first loop filter, which feeds back phase error information to the local oscillator via the first loop filter; and a second PLL (phase-locked loop) section, including a frequency control section a second loop filter, which feeds back a frequency control signal to the local oscillator via the second loop filter by performing an updating operation by means of the frequency control section when a mark ratio due to the phase error information deviates from a predetermined range.
    Type: Grant
    Filed: June 10, 1997
    Date of Patent: November 16, 1999
    Assignee: Fujitsu Limited
    Inventors: Hiroyuki Kiyanagi, Masayuki Watabe
  • Patent number: 5978415
    Abstract: The invention provides an automatic amplitude equalizer for compensating an amplitude characteristic of an input signal, wherein a control signal for equalizing an inclination amplitude distortion of an input signal is detected making use of a pair of digital demodulated signals to compensate for the amplitude characteristic of the input signal with a high degree of accuracy and which can be constructed with a reduced circuit scale and at a reduce cost.
    Type: Grant
    Filed: September 25, 1995
    Date of Patent: November 2, 1999
    Assignee: Fujitsu Limited
    Inventors: Kenzo Kobayashi, Toshio Kawasaki, Toshio Tamura, Hiroyuki Kiyanagi, Takanori Iwamatsu
  • Patent number: 5867542
    Abstract: The present invention relates to a clock phase detecting circuit and a clock regenerating circuit each arranged in a receiving unit of multiplex radio equipment. The receiving unit of the multiplex radio equipment includes an identifying circuit for identifying a signal obtained by demodulating a multilevel orthogonal modulation signal; a clock regenerating circuit for regenerating a signal identification clock for the identifying circuit to supply the clock to the identifying circuit; an equalizing circuit for subjecting the signal obtained by demodulating a multilevel orthogonal modulation signal to an equalizing process. A clock phase detecting unit detects the phase component of the signal identification clock based on signals input to or output from the equalizing circuit and then supplies the phase component to the clock regenerating circuit.
    Type: Grant
    Filed: November 3, 1995
    Date of Patent: February 2, 1999
    Assignee: Fujitsu Limited
    Inventors: Takanori Iwamatsu, Hiroyuki Kiyanagi
  • Patent number: 5596605
    Abstract: In the case where a received multi-level orthogonal amplitude signal is not synchronized with a local carrier frequency signal, a digital multiplexing radio receiver recognizes that an adaptively-equalized data exist in a specified area on the phase plane of Ich and Qch orthogonal coordinates. The receiver controls an operation of amplifying Ich and Qch demodulated signals to a fixed level, based on the data of which exist in the specified area. Similarly, the receiver controls a phase of the local carrier frequency signal based on the data of existing in the specified area, and controls tap coefficients of an adaptive transversal filter which equalizes the received multi-level orthogonal amplitude signal. In the specified area, a distance between signal points of multi-level orthogonal amplitude signal is large so that influence caused by a phase rotation is small. Accordingly, the digital multiplexing radio receiver can rapidly and stably return to a synchronous mode.
    Type: Grant
    Filed: March 20, 1995
    Date of Patent: January 21, 1997
    Assignee: Fujitsu Limited
    Inventors: Hiroyuki Kiyanagi, Yuitsu Ogata, Toshio Tamura, Hisao Narita, Takahiko Terakado, Kenzo Kobayashi
  • Patent number: 5594389
    Abstract: A carrier regeneration circuit achieves quick frequency synchronization without using a sweeper. An area judging device judges whether a baseband signal, quadrature-demodulated with a regenerated carrier output from a voltage-controlled oscillator, lies inside a designated area in a phase plane. If it is inside the designated area, an output of a phase comparator is selected, and if it has exited the area, the previous value is held. The designated area is set so that the direction of control indicated by the phase comparator, just before the baseband signal rotating in the phase plane exits the area, coincides with a direction that suppresses the rotation.
    Type: Grant
    Filed: November 30, 1995
    Date of Patent: January 14, 1997
    Assignee: Fujitsu Limited
    Inventors: Hiroyuki Kiyanagi, Takanori Iwamatsu
  • Patent number: RE40695
    Abstract: The present invention relates to a clock phase detecting circuit and a clock regenerating circuit each arranged in a receiving unit of multiplex radio equipment. The receiving unit of the multiplex radio equipment includes an identifying circuit for identifying a signal obtained by demodulating a multilevel orthogonal modulation signal; a clock regenerating circuit for regenerating a signal identification clock for the identifying circuit to supply the clock to the identifying circuit; an equalizing circuit for subjecting the signal obtained by demodulating a multilevel orthogonal modulation signal to an equalizing process. A clock phase detecting unit detects the phase component of the signal identification clock based on signals input to or output from the equalizing circuit and then supplies the phase component to the clock regenerating circuit.
    Type: Grant
    Filed: January 26, 2001
    Date of Patent: April 7, 2009
    Assignee: Fujitsu Limited
    Inventors: Takanori Iwamatsu, Hiroyuki Kiyanagi