Abstract: A semiconductor device includes a first internal terminal, a first transistor, a second transistor, an oscillator including an output terminal to output a clock signal, and a comparator coupled to a first internal terminal, and that compares a potential of the first internal terminal when the first internal terminal is coupled to the first reference potential with a potential of the first internal terminal when the first internal terminal is coupled to a second reference potential, an external terminal being connectable to the first internal terminal, and a second internal terminal being coupled to the external terminal, and that receives an input signal through the external terminal. Each of the first control terminal and the second control terminal is coupled to the output terminal to commonly receive the clock signal. The first transistor and the second transistor exclusively operate according to the clock signal.

Abstract: A semiconductor device including an internal terminal, a first transistor of a first conductivity type that is coupled between a first reference potential and the internal terminal, and that includes a first control terminal, a second transistor of a second conductivity type that is coupled between a second reference potential and the internal terminal, and that includes a second control terminal, an oscillator that includes an output terminal to output a clock signal, and a comparator that is coupled to the internal terminal, and that compares a potential of the internal terminal when the internal terminal is coupled to the first reference potential with a potential of the internal terminal when the internal terminal is coupled to the second reference potential. Each control terminals is coupled to the output terminal to commonly receive the clock signal, and the first and second transistors exclusively operate in response to the clock signal.

Abstract: A semiconductor device including an internal terminal, a first transistor of a first conductivity type that is coupled between a first reference potential and the internal terminal, and that includes a first control terminal, a second transistor of a second conductivity type that is coupled between a second reference potential and the internal terminal, and that includes a second control terminal, an oscillator that includes an output terminal to output a clock signal, and a comparator that is coupled to the internal terminal, and that compares a potential of the internal terminal when the internal terminal is coupled to the first reference potential with a potential of the internal terminal when the internal terminal is coupled to the second reference potential. Each control terminals is coupled to the output terminal to commonly receive the clock signal, and the first and second transistors exclusively operate in response to the clock signal.

Abstract: A semiconductor device has: a pull-up circuit connectable to an internal terminal; a pull-down circuit connectable to the internal terminal; and an operation mode switch circuit. The operation mode switch circuit switches an operation mode based on a potential of the internal terminal when the pull-up circuit is connected to the internal terminal and a potential of the internal terminal when the pull-down circuit is connected to the internal terminal.

Abstract: An A/D (analog-to-digital) conversion circuit includes an input signal selecting circuit configured to output voltage signals of different signal levels in response to control signals in an adjustment mode before A/D conversion of an analog signal in a practical mode; an A/D converter configured to perform A/D conversion on the voltage signals in response to an adjustment sampling clock signal in the adjustment mode to output adjustment conversion values; and a sampling timing adjusting circuit configured to delay a reference sampling clock signal based on a delay value selected in response to a selection signal in the adjustment mode to output the adjustment sampling clock signal to the A/D converter.

Abstract: An A/D (analog-to-digital) conversion circuit includes an input signal selecting circuit configured to output voltage signals of different signal levels in response to control signals in an adjustment mode before A/D conversion of an analog signal in a practical mode; an A/D converter configured to perform A/D conversion on the voltage signals in response to an adjustment sampling clock signal in the adjustment mode to output adjustment conversion values; and a sampling timing adjusting circuit configured to delay a reference sampling clock signal based on a delay value selected in response to a selection signal in the adjustment mode to output the adjustment sampling clock signal to the A/D converter.

Abstract: A semiconductor device has: a pull-up circuit connectable to an internal terminal; a pull-down circuit connectable to the internal terminal; and an operation mode switch circuit. The operation mode switch circuit switches an operation mode based on a potential of the internal terminal when the pull-up circuit is connected to the internal terminal and a potential of the internal terminal when the pull-down circuit is connected to the internal terminal.

Abstract: An output interface circuit realizes a fast and stable interface operation without any chip-size increase even if the external supply voltage varies within a specific range (e.g., from 5 V to 3.3 V or from 5 V to 2 V). The output interface circuit comprises a first and a second output buffer circuit for receiving an output signal of an internal circuit, and an output-level adjusting circuit for receiving the output signal of the second output buffer circuit, for level-adjusting the output signal, and for outputting the level-adjusted output signal to an external output terminal. The first or second output buffer circuit outputs a signal based on the value of an external supply voltage.

Abstract: An output interface circuit is provided, which realizes a fast and stable interface operation without any chip-size increase even if the external supply voltage varies within a specific range (e.g., from 5 V to 3.3 or from 5 V to 2 V).