Patents by Inventor Hiroyuki MAKIMOTO

Hiroyuki MAKIMOTO has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230011433
    Abstract: A semiconductor device includes a semiconductor chip that has a main surface, a device region that is demarcated at the main surface, a differential amplifier that is formed in the device region and that amplifies and outputs a differential signal input to the differential amplifier, an insulation layer that covers the device region on the main surface, and a shield electrode that is incorporated in the insulation layer such as to conceal the device region in a plan view and that is fixed to a ground potential.
    Type: Application
    Filed: December 4, 2020
    Publication date: January 12, 2023
    Inventors: Yusuke YOSHII, Yuki INOUE, Hiroyuki MAKIMOTO
  • Patent number: 11528001
    Abstract: An operational amplifier 1 comprises transistors Q1 and Q2 forming an input stage, and input resistors R1 and R2 which form a filter together with parasitic capacitors C1 and C2 accompanying the transistors Q1 and Q2. Resistance values R of the resistors R1 and R2 may be set to R=1/(2?·fc·C), where C is the capacitance value of each of the parasitic capacitors C1 and C2, and fc is the target cutoff frequency of the filter. The operational amplifier 1 may also include a power supply resistor R0 which forms a filter together with a parasitic capacitor C0 accompanying a power supply line.
    Type: Grant
    Filed: August 11, 2021
    Date of Patent: December 13, 2022
    Assignee: Rohm Co., Ltd.
    Inventors: Hiroyuki Makimoto, Yusuke Yoshii, Yuki Inoue
  • Patent number: 11506691
    Abstract: A voltage monitoring circuit monitors a magnitude relationship between a monitoring target voltage and a determination voltage and is capable of suppressing the influence of an offset of a reference voltage upon the determination voltage and setting the determination voltage as desired. The voltage monitoring circuit includes: an input terminal, applied with a monitoring target voltage or a divided voltage of the monitoring target voltage; a reference voltage generating circuit, generating a first reference voltage; a linear power circuit, converting the first reference voltage to a second reference voltage; a feedback resistor, generating a divided voltage of the second reference voltage, and negatively feeding back the divided voltage of the second reference voltage to the linear power circuit; and a comparing portion, comparing the second reference voltage with the monitoring target voltage or the divided voltage of the monitoring target voltage applied to the input terminal.
    Type: Grant
    Filed: July 15, 2020
    Date of Patent: November 22, 2022
    Assignee: Rohm Co., Ltd.
    Inventors: Ayumu Kambara, Yuki Inoue, Hiroyuki Makimoto
  • Publication number: 20210367570
    Abstract: An operational amplifier 1 comprises transistors Q1 and Q2 forming an input stage, and input resistors R1 and R2 which form a filter together with parasitic capacitors C1 and C2 accompanying the transistors Q1 and Q2. Resistance values R of the resistors R1 and R2 may be set to R=1/(2?·fc·C), where C is the capacitance value of each of the parasitic capacitors C1 and C2, and fc is the target cutoff frequency of the filter. The operational amplifier 1 may also include a power supply resistor R0 which forms a filter together with a parasitic capacitor C0 accompanying a power supply line.
    Type: Application
    Filed: August 11, 2021
    Publication date: November 25, 2021
    Inventors: Hiroyuki Makimoto, Yusuke Yoshii, Yuki Inoue
  • Patent number: 11121685
    Abstract: An operational amplifier 1 comprises transistors Q1 and Q2 forming an input stage, and input resistors R1 and R2 which form a filter together with parasitic capacitors C1 and C2 accompanying the transistors Q1 and Q2. Resistance values R of the resistors R1 and R2 may be set to R=1/(2?·fc·C), where C is the capacitance value of each of the parasitic capacitors C1 and C2, and fc is the target cutoff frequency of the filter. The operational amplifier 1 may also include a power supply resistor R0 which forms a filter together with a parasitic capacitor C0 accompanying a power supply line.
    Type: Grant
    Filed: August 6, 2018
    Date of Patent: September 14, 2021
    Assignee: Rohm Co., Ltd.
    Inventors: Hiroyuki Makimoto, Yusuke Yoshii, Yuki Inoue
  • Publication number: 20210025922
    Abstract: A voltage monitoring circuit monitors a magnitude relationship between a monitoring target voltage and a determination voltage and is capable of suppressing the influence of an offset of a reference voltage upon the determination voltage and setting the determination voltage as desired. The voltage monitoring circuit includes: an input terminal, applied with a monitoring target voltage or a divided voltage of the monitoring target voltage; a reference voltage generating circuit, generating a first reference voltage; a linear power circuit, converting the first reference voltage to a second reference voltage; a feedback resistor, generating a divided voltage of the second reference voltage, and negatively feeding back the divided voltage of the second reference voltage to the linear power circuit; and a comparing portion, comparing the second reference voltage with the monitoring target voltage or the divided voltage of the monitoring target voltage applied to the input terminal.
    Type: Application
    Filed: July 15, 2020
    Publication date: January 28, 2021
    Applicant: ROHM CO., LTD.
    Inventors: Ayumu KAMBARA, Yuki INOUE, Hiroyuki MAKIMOTO
  • Publication number: 20200358410
    Abstract: An operational amplifier 1 comprises transistors Q1 and Q2 forming an input stage, and input resistors R1 and R2 which form a filter together with parasitic capacitors C1 and C2 accompanying the transistors Q1 and Q2. Resistance values R of the resistors R1 and R2 may be set to R=1/(2?·fc·C), where C is the capacitance value of each of the parasitic capacitors C1 and C2, and fc is the target cutoff frequency of the filter. The operational amplifier 1 may also include a power supply resistor R0 which forms a filter together with a parasitic capacitor C0 accompanying a power supply line.
    Type: Application
    Filed: August 6, 2018
    Publication date: November 12, 2020
    Applicant: ROHM CO., LTD
    Inventors: Hiroyuki Makimoto, Yusuke Yoshii, Yuki Inoue
  • Patent number: 10784870
    Abstract: An electronic circuit is configured to output an output signal after elapse of a predetermined time from a received trigger signal, and includes an oscillator configured to output a pulse signal having a predetermined oscillation frequency; a counter circuit configured to count the pulse signal from the oscillator upon receiving the trigger signal and to output the output signal in response to a count value reaching a predetermined value; and a trimming circuit including a plurality of trimming elements which includes a cuttable conductive part and configured to output a selection signal corresponding to a trimming element having a cut conductive part. In the trimming circuit, the trimming element, which corresponds to the oscillation frequency of the pulse signal output from the oscillator among the plurality of trimming elements, is cut, and the counter circuit is configured to set the predetermined value according to the selection signal.
    Type: Grant
    Filed: January 9, 2020
    Date of Patent: September 22, 2020
    Assignee: Rohm Co., Ltd.
    Inventor: Hiroyuki Makimoto
  • Publication number: 20200145010
    Abstract: An electronic circuit is configured to output an output signal after elapse of a predetermined time from a received trigger signal, and includes an oscillator configured to output a pulse signal having a predetermined oscillation frequency; a counter circuit configured to count the pulse signal from the oscillator upon receiving the trigger signal and to output the output signal in response to a count value reaching a predetermined value; and a trimming circuit including a plurality of trimming elements which includes a cuttable conductive part and configured to output a selection signal corresponding to a trimming element having a cut conductive part. In the trimming circuit, the trimming element, which corresponds to the oscillation frequency of the pulse signal output from the oscillator among the plurality of trimming elements, is cut, and the counter circuit is configured to set the predetermined value according to the selection signal.
    Type: Application
    Filed: January 9, 2020
    Publication date: May 7, 2020
    Applicant: Rohm Co., Ltd.
    Inventor: Hiroyuki Makimoto
  • Patent number: 10554208
    Abstract: An electronic circuit is configured to output an output signal after elapse of a predetermined time from a received trigger signal, and includes an oscillator configured to output a pulse signal having a predetermined oscillation frequency; a counter circuit configured to count the pulse signal from the oscillator upon receiving the trigger signal and to output the output signal in response to a count value reaching a predetermined value; and a trimming circuit including a plurality of trimming elements which includes a cuttable conductive part and configured to output a selection signal corresponding to a trimming element having a cut conductive part. In the trimming circuit, the trimming element, which corresponds to the oscillation frequency of the pulse signal output from the oscillator among the plurality of trimming elements, is cut, and the counter circuit is configured to set the predetermined value according to the selection signal.
    Type: Grant
    Filed: March 26, 2019
    Date of Patent: February 4, 2020
    Assignee: Rohm Co., Ltd.
    Inventor: Hiroyuki Makimoto
  • Publication number: 20190305780
    Abstract: An electronic circuit is configured to output an output signal after elapse of a predetermined time from a received trigger signal, and includes an oscillator configured to output a pulse signal having a predetermined oscillation frequency; a counter circuit configured to count the pulse signal from the oscillator upon receiving the trigger signal and to output the output signal in response to a count value reaching a predetermined value; and a trimming circuit including a plurality of trimming elements which includes a cuttable conductive part and configured to output a selection signal corresponding to a trimming element having a cut conductive part. In the trimming circuit, the trimming element, which corresponds to the oscillation frequency of the pulse signal output from the oscillator among the plurality of trimming elements, is cut, and the counter circuit is configured to set the predetermined value according to the selection signal.
    Type: Application
    Filed: March 26, 2019
    Publication date: October 3, 2019
    Applicant: Rohm Co., Ltd.
    Inventor: Hiroyuki MAKIMOTO