Patents by Inventor Hiroyuki Masato

Hiroyuki Masato has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7585706
    Abstract: The semiconductor device of this invention includes an active region formed from a group III nitride semiconductor grown on a substrate and an insulating oxide film formed in a peripheral portion of the active region by oxidizing the group III nitride semiconductor. On the active region, a gate electrode in Schottky contact with the active region extending onto the insulating oxide film and having an extended portion on the insulating oxide film is formed, and ohmic electrodes respectively serving as a source electrode and a drain electrode are formed with space from side edges along the gate length direction of the gate electrode.
    Type: Grant
    Filed: September 18, 2007
    Date of Patent: September 8, 2009
    Assignee: Panasonic Corporation
    Inventors: Katsunori Nishii, Kaoru Inoue, Toshinobu Matsuno, Yoshito Ikeda, Hiroyuki Masato
  • Publication number: 20080038856
    Abstract: The semiconductor device of this invention includes an active region formed from a group III nitride semiconductor grown on a substrate and an insulating oxide film formed in a peripheral portion of the active region by oxidizing the group III nitride semiconductor. On the active region, a gate electrode in Schottky contact with the active region extending onto the insulating oxide film and having an extended portion on the insulating oxide film is formed, and ohmic electrodes respectively serving as a source electrode and a drain electrode are formed with space from side edges along the gate length direction of the gate electrode.
    Type: Application
    Filed: September 18, 2007
    Publication date: February 14, 2008
    Applicant: Matsushita Electronics Corporation
    Inventors: Katsunori NISHII, Kaoru INOUE, Toshinobu MATSUNO, Yoshito IKEDA, Hiroyuki MASATO
  • Patent number: 7307292
    Abstract: An insulating-gate semiconductor device has a first nitride semiconductor layer formed over a substrate and an insulating oxidation layer obtained by oxidizing a second nitride semiconductor layer formed on the first nitride semiconductor layer. A gate electrode is formed on the insulating oxidation layer.
    Type: Grant
    Filed: June 9, 2003
    Date of Patent: December 11, 2007
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Katsunori Nishii, Kaoru Inoue, Toshinobu Matsuno, Yoshito Ikeda, Hiroyuki Masato
  • Patent number: 7285806
    Abstract: The semiconductor device of this invention includes an active region formed from a group III nitride semiconductor grown on a substrate and an insulating oxide film formed in a peripheral portion of the active region by oxidizing the group III nitride semiconductor. On the active region, a gate electrode in Schottky contact with the active region extending onto the insulating oxide film and having an extended portion on the insulating oxide film is formed, and ohmic electrodes respectively serving as a source electrode and a drain electrode are formed with space from side edges along the gate length direction of the gate electrode.
    Type: Grant
    Filed: March 21, 2001
    Date of Patent: October 23, 2007
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Katsunori Nishi, Kaoru Inoue, Toshinobu Matsuno, Yoshito Ikeda, Hiroyuki Masato
  • Patent number: 6924516
    Abstract: A semiconductor device includes: a substrate; a buffer layer including GaN formed on the substrate, wherein: surfaces of the buffer layer are c facets of Ga atoms; a channel layer including GaN or InGaN formed on the buffer layer,wherein: surfaces of the channel layer are c facets of Ga or In atoms; an electron donor layer including AlGaN formed on the channel layer, wherein: surfaces of the electron donor layer are c facets of Al or Ga atoms; a source electrode and a drain electrode formed on the electron donor layer; a cap layer including GaN or InGaAlN formed between the source electrode and the drain electrode, wherein: surfaces of the cap layer are c facets of Ga or In atoms and at least a portion of the cap layer is in contact with the electron donor layer; and a gate electrode formed at least a portion of which is in contact with the cap layer.
    Type: Grant
    Filed: August 26, 2004
    Date of Patent: August 2, 2005
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Kaoru Inoue, Katsunori Nishii, Hiroyuki Masato
  • Patent number: 6852612
    Abstract: The semiconductor device of the present invention includes: a gallium nitride (GaN) compound semiconductor layer; and a Schottky electrode formed on the GaN compound semiconductor layer, wherein the Schottky electrode contains silicon.
    Type: Grant
    Filed: December 20, 2002
    Date of Patent: February 8, 2005
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Katsunori Nishii, Yoshito Ikeda, Hiroyuki Masato, Kaoru Inoue
  • Publication number: 20050006664
    Abstract: A semiconductor device includes an AlGaN film formed on a GaN film on a substrate, a gate electrode formed on the AlGaN film, and source and drain electrodes formed on either side of the gate electrode on the AlGaN film. An n-type InxGayAl1-x-yN film is interposed between the source and drain electrodes and the AlGaN film. Alternatively, the semiconductor device includes an n-type InxGayAl1-x-yN film formed on a GaN film on a substrate, a gate electrode formed on the InxGayAl1-x-yN film, and source and drain electrodes formed on either side of the gate electrode on the InxGayAl1-x-yN film.
    Type: Application
    Filed: August 3, 2004
    Publication date: January 13, 2005
    Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
    Inventors: Kaoru Inoue, Yoshito Ikeda, Hiroyuki Masato
  • Publication number: 20050001234
    Abstract: A semiconductor device includes: a substrate; a buffer layer including GaN formed on the substrate, wherein: surfaces of the buffer layer are c facets of Ga atoms; a channel layer including GaN or InGaN formed on the buffer layer, wherein: surfaces of the channel layer are c facets of Ga or In atoms; an electron donor layer including AlGaN formed on the channel layer, wherein: surfaces of the electron donor layer are c facets of Al or Ga atoms; a source electrode and a drain electrode formed on the electron donor layer; a cap layer including GaN or InGaAlN formed between the source electrode and the drain electrode, wherein: surfaces of the cap layer are c facets of Ga or In atoms and at least a portion of the cap layer is in contact with the electron donor layer; and a gate electrode formed at least a portion of which is in contact with the cap layer.
    Type: Application
    Filed: August 26, 2004
    Publication date: January 6, 2005
    Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
    Inventors: Kaoru INOUE, Katsunori NISHII, Hiroyuki MASATO
  • Patent number: 6812505
    Abstract: A semiconductor device includes: a substrate; a buffer layer including GaN formed on the substrate, wherein: surfaces of the buffer layer are c facets of Ga atoms; a channel layer including GaN or InGaN formed on the buffer layer, wherein: surfaces of the channel layer are c facets of Ga or In atoms; an electron donor layer including AlGaN formed on the channel layer, wherein: surfaces of the electron donor layer are c facets of Al or Ga atoms; a source electrode and a drain electrode formed on the electron donor layer; a cap layer including GaN or InGaAlN formed between the source electrode and the drain electrode, wherein: surfaces of the cap layer are c facets of Ga or In atoms and at least a portion of the cap layer is in contact with the electron donor layer; and a gate electrode formed at least a portion of which is in contact with the cap layer.
    Type: Grant
    Filed: September 2, 2003
    Date of Patent: November 2, 2004
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Kaoru Inoue, Katsunori Nishii, Hiroyuki Masato
  • Patent number: 6809352
    Abstract: The semiconductor device of the present invention includes: a gallium nitride (GaN) compound semiconductor layer; and a Schottky electrode formed on the GaN compound semiconductor layer, wherein the Schottky electrode contains silicon.
    Type: Grant
    Filed: December 27, 2002
    Date of Patent: October 26, 2004
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Katsunori Nishii, Yoshito Ikeda, Hiroyuki Masato, Kaoru Inoue
  • Patent number: 6787820
    Abstract: A semiconductor device includes an AlGaN film formed on a GaN film on a substrate, a gate electrode formed on the AlGaN film, and source and drain electrodes formed on either side of the gate electrode on the AlGaN film. An n-type InxGayAl1-x-yN film is interposed between the source and drain electrodes and the AlGaN film. Alternatively, the semiconductor device includes an n-type InxGayAl1-x-yN film formed on a GaN film on a substrate, a gate electrode formed on the InxGayAl1-x-yN film, and source and drain electrodes formed on either side of the gate electrode on the InxGayAl1-x-yN film.
    Type: Grant
    Filed: January 31, 2002
    Date of Patent: September 7, 2004
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Kaoru Inoue, Yoshito Ikeda, Hiroyuki Masato
  • Patent number: 6774449
    Abstract: The semiconductor device of the present invention includes: a gallium nitride (GaN) compound semiconductor layer; and a Schottky electrode formed on the GaN compound semiconductor layer, wherein the Schottky electrode contains silicon.
    Type: Grant
    Filed: September 18, 2000
    Date of Patent: August 10, 2004
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Katsunori Nishii, Yoshito Ikeda, Hiroyuki Masato, Kaoru Inoue
  • Publication number: 20040113158
    Abstract: A semiconductor device includes: a substrate; a buffer layer including GaN formed on the substrate, wherein: surfaces of the buffer layer are c facets of Ga atoms; a channel layer including GaN or InGaN formed on the buffer layer, wherein: surfaces of the channel layer are c facets of Ga or In atoms; an electron donor layer including AlGaN formed on the channel layer, wherein: surfaces of the electron donor layer are c facets of Al or Ga atoms; a source electrode and a drain electrode formed on the electron donor layer; a cap layer including GaN or InGaAlN formed between the source electrode and the drain electrode, wherein: surfaces of the cap layer are c facets of Ga or In atoms and at least a portion of the cap layer is in contact with the electron donor layer; and a gate electrode formed at least a portion of which is in contact with the cap layer.
    Type: Application
    Filed: September 2, 2003
    Publication date: June 17, 2004
    Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
    Inventors: Kaoru INOUE, Katsunori NISHII, Hiroyuki MASATO
  • Publication number: 20030209762
    Abstract: An insulating-gate semiconductor device has a first nitride semiconductor layer formed over a substrate and an insulating oxidation layer obtained by oxidizing a second nitride semiconductor layer formed on the first nitride semiconductor layer. A gate electrode is formed on the insulating oxidation layer.
    Type: Application
    Filed: June 9, 2003
    Publication date: November 13, 2003
    Applicant: Matsushita Electric Industrial Co., Ltd.
    Inventors: Katsunori Nishii, Kaoru Inoue, Toshinobu Matsuno, Yoshito Ikeda, Hiroyuki Masato
  • Publication number: 20030205721
    Abstract: The semiconductor device of this invention includes an active region formed from a group III nitride semiconductor grown on a substrate and an insulating oxide film formed in a peripheral portion of the active region by oxidizing the group III nitride semiconductor. On the active region, a gate electrode in Schottky contact with the active region extending onto the insulating oxide film and having an extended portion on the insulating oxide film is formed, and ohmic electrodes respectively serving as a source electrode and a drain electrode are formed with space from side edges along the gate length direction of the gate electrode.
    Type: Application
    Filed: March 21, 2001
    Publication date: November 6, 2003
    Inventors: Katsunori Nishii, Kaoru Inoue, Toshinobu Matsuno, Yoshito Ikeda, Hiroyuki Masato
  • Patent number: 6639255
    Abstract: A semiconductor device includes: a substrate; a buffer layer including GaN formed on the substrate, wherein: surfaces of the buffer layer are c facets of Ga atoms; a channel layer including GaN or InGaN formed on the buffer layer, wherein: surfaces of the channel layer are c facets of Ga or In atoms; an electron donor layer including AlGaN formed on the channel layer, wherein: surfaces of the electron donor layer are c facets of Al or Ga atoms; a source electrode and a drain electrode formed on the electron donor layer; a cap layer including GaN or InGaAlN formed between the source electrode and the drain electrode, wherein: surfaces of the cap layer are c facets of Ga or In atoms and at least a portion of the cap layer is in contact with the electron donor layer; and a gate electrode formed at least a portion of which is in contact with the cap layer.
    Type: Grant
    Filed: December 8, 2000
    Date of Patent: October 28, 2003
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Kaoru Inoue, Katsunori Nishii, Hiroyuki Masato
  • Patent number: 6593193
    Abstract: An insulating-gate semiconductor device has a first nitride semiconductor layer formed over a substrate and an insulating oxidation layer obtained by oxidizing a second nitride semiconductor layer formed on the first nitride semiconductor layer. A gate electrode is formed on the insulating oxidation layer.
    Type: Grant
    Filed: January 25, 2002
    Date of Patent: July 15, 2003
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Katsunori Nishii, Kaoru Inoue, Toshinobu Matsuno, Yoshito Ikeda, Hiroyuki Masato
  • Publication number: 20030107101
    Abstract: The semiconductor device of the present invention includes: a gallium nitride (GaN) compound semiconductor layer; and a Schottky electrode formed on the GaN compound semiconductor layer, wherein the Schottky electrode contains silicon.
    Type: Application
    Filed: December 27, 2002
    Publication date: June 12, 2003
    Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
    Inventors: Katsunori Nishii, Yoshito Ikeda, Hiroyuki Masato, Kaoru Inoue
  • Publication number: 20030109088
    Abstract: The semiconductor device of the present invention includes: a gallium nitride (GaN) compound semiconductor layer; and a Schottky electrode formed on the GaN compound semiconductor layer, wherein the Schottky electrode contains silicon.
    Type: Application
    Filed: December 20, 2002
    Publication date: June 12, 2003
    Applicant: Matsushita Electronics Corporation
    Inventors: Katsunori Nishii, Yoshito Ikeda, Hiroyuki Masato, Kaoru Inoue
  • Patent number: 6531718
    Abstract: A semiconductor device includes: a substrate; a buffer layer including GaN formed on the substrate, wherein surfaces of the buffer layer are c facets of Ga atoms; a separating layer including (InXAl1-X)YGa1-YN (where 0≦X≦1, 0≦Y≦1) formed on the buffer layer, wherein surfaces of the separating layer are c facets of In, Al, or Ga atoms; a channel layer including GaN, InGaN, or a combination of GaN and InGaN formed on the separating layer, wherein surfaces of the channel layer are c facets of Ga or In atoms; and an electron supply layer including AlGaN formed on the channel layer, wherein surfaces of the electron supply layer are c facets of Al or Ga atoms, wherein the AlN composition ratio in the separating layer is smaller than the AlN composition ratio in the electron supply layer.
    Type: Grant
    Filed: January 12, 2001
    Date of Patent: March 11, 2003
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Kaoru Inoue, Katsunori Nishii, Hiroyuki Masato