Patents by Inventor Hiroyuki Mathuda

Hiroyuki Mathuda has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5177377
    Abstract: A Bi-CMOS circuit includes a bipolar output stage and a CMOS circuit. The bipolar output stage includes pull-up and pull-down transistors which form an output end. The CMOS circuit receives an input signal and generates a signal for driving the output stage. The CMOS circuit comprises a CMOS inverter for receiving the input signal, a p-channel MOS transistor for driving the pull-up transistor of the bipolar output stage based on the input signal, an n-channel MOS transistor for driving the pull-down transistors of the bipolar output stage based on the input signal, a p-channel MOS transistor for discharging a base of the pull-up transistor based on an output of the CMOS inverter, and an n-channel MOS transistor for discharging a base of the pull-down transistor based on an output of the CMOS inverter.
    Type: Grant
    Filed: May 15, 1991
    Date of Patent: January 5, 1993
    Assignee: Fujitsu Limited
    Inventors: Hiroyuki Mathuda, Shinzou Satou