Patents by Inventor Hiroyuki Misawa

Hiroyuki Misawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5239572
    Abstract: In a cordless key telephone system, access units are located in groups corresponding to service areas for broadcasting radio signals on a control channel or on an assigned speech channel to cordless stations. A main controller selects one of the access units for each service area in response to an incoming call from the switched telephone network and sends a first alert signal to the selected access units to cause them to broadcast a recurrent sequence of second alert signals containing the identifiers of standby cordless stations. The second alert signal is received by each standby cordless station and an ACK signal is transmitted if the received signal contains its identifier. The ACK signal is copied by each access unit for transmission to the main controller, whereupon it returns a proceed-to-assign signal if the number of the received copies of the ACK signals is equal to the number of all standby stations.
    Type: Grant
    Filed: April 17, 1991
    Date of Patent: August 24, 1993
    Assignees: NEC Corporation, Nippon Telegraph and Telephone Corporation
    Inventors: Noboru Saegusa, Akio Yotsutani, Shinji Kumataka, Kouzo Kobayashi, Hiroyuki Misawa, Kosuke Hashimoto
  • Patent number: 5119168
    Abstract: A power supply wiring arrangement of a semiconductor integrated circuit formed on a semiconductor chip, including a plurality of pairs of metal bumps formed on the semiconductor chip, a plurality of conductor strips each extending between the bumps forming each of the pairs of metal bumps, and a plurality of thick-layer wiring strips directly connected to selected ones of the metal bumps and the conductor strips, the thick-layer wiring strips being substantially identical in material and in thickness to the metal bumps.
    Type: Grant
    Filed: September 27, 1989
    Date of Patent: June 2, 1992
    Assignee: NEC Corporation
    Inventor: Hiroyuki Misawa
  • Patent number: 5077493
    Abstract: A gate array integrated circuit includes four internal logic circuits each composed of a current mode logic circuit and an emitter follower circuit having an input connected to an output of the current mode logic circuit. One wired logic circuit is formed by interconnecting output terminals of four emitter follower circuits. An one end of an interconnection wiring conductor for interconnecting the output terminals of the four emitter follower circuits is connected to an output terminal of a first emitter follower circuit, and the other end of the interconnection wiring conductor is connected to an output terminal of fourth emitter follower circuit of the N emitter follower circuits.
    Type: Grant
    Filed: November 28, 1990
    Date of Patent: December 31, 1991
    Assignee: NEC Corporation
    Inventor: Hiroyuki Misawa