Patents by Inventor Hiroyuki Miyake

Hiroyuki Miyake has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210320128
    Abstract: To suppress fluctuation in the threshold voltage of a transistor, to reduce the number of connections of a display panel and a driver IC, to achieve reduction in power consumption of a display device, and to achieve increase in size and high definition of the display device. A gate electrode of a transistor which easily deteriorates is connected to a wiring to which a high potential is supplied through a first switching transistor and a wiring to which a low potential is supplied through a second switching transistor; a clock signal is input to a gate electrode of the first switching transistor; and an inverted clock signal is input to a gate electrode of the second switching transistor. Thus, the high potential and the low potential are alternately applied to the gate electrode of the transistor which easily deteriorates.
    Type: Application
    Filed: February 17, 2021
    Publication date: October 14, 2021
    Inventors: Atsushi UMEZAKI, Hiroyuki MIYAKE
  • Patent number: 11133078
    Abstract: A semiconductor device in which a decrease in the yield by electrostatic destruction can be prevented is provided. A scan line driver circuit for supplying a signal for selecting a plurality of pixels to a scan line includes a shift register for generating the signal. One conductive film functioning as respective gate electrodes of a plurality of transistors in the shift register is divided into a plurality of conductive films. The divided conductive films are electrically connected to each other by a conductive film which is formed in a layer different from the divided conductive films are formed. The plurality of transistors includes a transistor on an output side of the shift register.
    Type: Grant
    Filed: February 3, 2020
    Date of Patent: September 28, 2021
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Masayuki Sakakura, Yuugo Goto, Hiroyuki Miyake, Daisuke Kurosaki
  • Publication number: 20210295793
    Abstract: The liquid crystal display device includes a first substrate provided with a terminal portion, a switching transistor, a driver circuit portion, and a pixel circuit portion including a pixel transistor and a plurality of pixels, a second substrate provided with a common electrode electrically connected to the terminal portion through the switching transistor, and liquid crystal between a pixel electrode and the common electrode. In a period during which a still image is switched to a moving image, the following steps are sequentially performed: a first step of supplying the common potential to the common electrode; a second step of supplying a power supply voltage to the driver circuit portion; a third step of supplying a clock signal to the driver circuit portion; and a fourth step of supplying a start pulse signal to the driver circuit portion.
    Type: Application
    Filed: June 4, 2021
    Publication date: September 23, 2021
    Inventors: Jun KOYAMA, Hiroyuki MIYAKE
  • Publication number: 20210294446
    Abstract: Sensing time of a touch sensor is shortened to increase responsiveness of touch sensing. A display device includes a gate driver, a plurality of touch sensors, and a plurality of touch wirings. The gate driver has a function of supplying a scan signal to the plurality of touch wirings at the same timing, and the touch sensors in different positions sense a plurality of touches at the same timing. In this manner, the responsiveness of touch sensing is increased. The gate driver has a function of controlling a scan signal for refreshing display and a scan signal used by the touch sensor for sensing.
    Type: Application
    Filed: June 1, 2021
    Publication date: September 23, 2021
    Inventors: Hiroyuki MIYAKE, Takahiro FUKUTOME
  • Publication number: 20210288079
    Abstract: An object of an embodiment of the present invention is to manufacture a semiconductor device with high display quality and high reliability, which includes a pixel portion and a driver circuit portion capable of high-speed operation over one substrate, using transistors having favorable electric characteristics and high reliability as switching elements. Two kinds of transistors, in each of which an oxide semiconductor layer including a crystalline region on one surface side is used as an active layer, are formed in a driver circuit portion and a pixel portion. Electric characteristics of the transistors can be selected by choosing the position of the gate electrode layer which determines the position of the channel. Thus, a semiconductor device including a driver circuit portion capable of high-speed operation and a pixel portion over one substrate can be manufactured.
    Type: Application
    Filed: May 24, 2021
    Publication date: September 16, 2021
    Inventors: Shunpei YAMAZAKI, Jun KOYAMA, Hiroyuki MIYAKE
  • Publication number: 20210278715
    Abstract: A display device in which parasitic capacitance between wirings can be reduced is provided. Furthermore, a display device in which display quality is improved is provided. Furthermore, a display device in which power consumption can be reduced is provided. The display device includes a signal line, a scan line, a first electrode, a second electrode, a third electrode, a first pixel electrode, a second pixel electrode, and a semiconductor film.
    Type: Application
    Filed: May 21, 2021
    Publication date: September 9, 2021
    Inventors: Hiroyuki MIYAKE, Makoto KANEYASU
  • Patent number: 11107432
    Abstract: In a pulse output circuit in a shift register, a power source line which is connected to a transistor in an output portion connected to a pulse output circuit at the next stage is set to a low-potential drive voltage, and a power source line which is connected to a transistor in an output portion connected to a scan signal line is set to a variable potential drive voltage. The variable potential drive voltage is the low-potential drive voltage in a normal mode, and can be either a high-potential drive voltage or the low-potential drive voltage in a batch mode. In the batch mode, display scan signals can be output to a plurality of scan signal lines at the same timing in a batch.
    Type: Grant
    Filed: October 19, 2020
    Date of Patent: August 31, 2021
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Seiko Amano, Hiroyuki Miyake
  • Patent number: 11107840
    Abstract: An object of an embodiment of the present invention is to manufacture a semiconductor device with high display quality and high reliability, which includes a pixel portion and a driver circuit portion capable of high-speed operation over one substrate, using transistors having favorable electric characteristics and high reliability as switching elements. Two kinds of transistors, in each of which an oxide semiconductor layer including a crystalline region on one surface side is used as an active layer, are formed in a driver circuit portion and a pixel portion. Electric characteristics of the transistors can be selected by choosing the position of the gate electrode layer which determines the position of the channel. Thus, a semiconductor device including a driver circuit portion capable of high-speed operation and a pixel portion over one substrate can be manufactured.
    Type: Grant
    Filed: February 3, 2020
    Date of Patent: August 31, 2021
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Jun Koyama, Hiroyuki Miyake
  • Patent number: 11107838
    Abstract: An object of an embodiment of the present invention is to manufacture a semiconductor device with high display quality and high reliability, which includes a pixel portion and a driver circuit portion capable of high-speed operation over one substrate, using transistors having favorable electric characteristics and high reliability as switching elements. Two kinds of transistors, in each of which an oxide semiconductor layer including a crystalline region on one surface side is used as an active layer, are formed in a driver circuit portion and a pixel portion. Electric characteristics of the transistors can be selected by choosing the position of the gate electrode layer which determines the position of the channel. Thus, a semiconductor device including a driver circuit portion capable of high-speed operation and a pixel portion over one substrate can be manufactured.
    Type: Grant
    Filed: April 23, 2019
    Date of Patent: August 31, 2021
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Jun Koyama, Hiroyuki Miyake
  • Patent number: 11107396
    Abstract: Objects are to provide a display device the power consumption of which is reduced, to provide a self-luminous display device the power consumption of which is reduced and which is capable of long-term use in a dark place. A circuit is formed using a thin film transistor in which a highly-purified oxide semiconductor is used and a pixel can keep a certain state (a state in which a video signal has been written). As a result, even in the case of displaying a still image, stable operation is easily performed. In addition, an operation interval of a driver circuit can be extended, which results in a reduction in power consumption of a display device. Moreover, a light-storing material is used in a pixel portion of a self-luminous display device to store light, whereby the display device can be used in a dark place for a long time.
    Type: Grant
    Filed: April 30, 2020
    Date of Patent: August 31, 2021
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Jun Koyama, Hiroyuki Miyake
  • Patent number: 11092856
    Abstract: A display device in which parasitic capacitance between wirings can be reduced is provided. Furthermore, a display device in which display quality is improved is provided. Furthermore, a display device in which power consumption can be reduced is provided. The display device includes a signal line, a scan line, a first electrode, a second electrode, a third electrode, a first pixel electrode, a second pixel electrode, and a semiconductor film.
    Type: Grant
    Filed: October 2, 2020
    Date of Patent: August 17, 2021
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Hiroyuki Miyake, Makoto Kaneyasu
  • Patent number: 11081050
    Abstract: A light-emitting device in which variation in luminance of pixels is suppressed. A light-emitting device includes at least a transistor, a first wiring, a second wiring, a first switch, a second switch, a third switch, a fourth switch, a capacitor, and a light-emitting element. The first wiring and a first electrode of the capacitor are electrically connected to each other through the first switch. A second electrode of the capacitor is connected to a first terminal of the transistor. The second wiring and a gate of the transistor are electrically connected to each other through the second switch. The first electrode of the capacitor and the gate of the transistor are electrically connected to each other through the third switch. The first terminal of the transistor and an anode of the light-emitting element are electrically connected to each other through the fourth switch.
    Type: Grant
    Filed: April 21, 2020
    Date of Patent: August 3, 2021
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Seiko Inoue, Hiroyuki Miyake
  • Patent number: 11075533
    Abstract: A lithium ion secondary battery includes a positive electrode including a positive electrode active material layer containing lithium iron phosphate, a negative electrode including a negative electrode active material layer containing graphite, and an electrolyte including a lithium salt and a solvent including ethylene carbonate and diethyl carbonate between the positive electrode and the negative electrode. When the battery temperature of the lithium ion secondary battery or the temperature of an environment in which the lithium ion secondary battery is used is T and given temperatures are T1 and T2 (T1<T2), in the case where T<T1, constant current charge is performed until voltage reaches a given value and then constant voltage charge is performed; in the case where T1?T<T2, only constant current charge is performed; and in the case where T2?T, charge is not performed.
    Type: Grant
    Filed: October 21, 2019
    Date of Patent: July 27, 2021
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Minoru Takahashi, Junpei Momo, Hiroyuki Miyake, Kei Takahashi
  • Publication number: 20210225314
    Abstract: A scan line to which a selection signal or a non-selection signal is input from its end, and a transistor in which a clock signal is input to a gate, the non-selection signal is input to a source, and a drain is connected to the scan line are provided. A signal input to the end of the scan line is switched from the selection signal to the non-selection signal at the same or substantially the same time as the transistor is turned on. The non-selection signal is input not only from one end but also from both ends of the scan line. This makes it possible to inhibit the potentials of portions in the scan line from being changed at different times.
    Type: Application
    Filed: December 28, 2020
    Publication date: July 22, 2021
    Inventor: Hiroyuki MIYAKE
  • Patent number: 11069747
    Abstract: To provide a display device that is suitable for increasing in size, a display device in which display unevenness is suppressed, or a display device that can display an image along a curved surface. The display device includes a first display panel and a second display panel each including a pair of substrates. The first display panel and the second display panel each include a first region which can transmit visible light, a second region which can block visible light, and a third region which can perform display. The third region of the first display panel and the first region of the second display panel overlap each other. The third region of the first display panel and the second region of the second display panel do not overlap each other.
    Type: Grant
    Filed: April 30, 2020
    Date of Patent: July 20, 2021
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Hiroyuki Miyake, Hisao Ikeda
  • Publication number: 20210201834
    Abstract: A liquid crystal display device comprising a backlight and a pixel portion including first to 2n-th scan lines, wherein, in a first case of expressing a color image, first pixels controlled by the first to n-th scan lines are configured to express a first image using at least one of first to third hues supplied in a first rotating order, and second pixels controlled by the (n+1)-th to 2n-th scan lines are configured to express a second image using at least one of the first to third hues supplied in a second rotating order, wherein, in a second case of expressing a monochrome image, the first and second pixels controlled by the first to 2n-th scan lines are configured to express the monochrome image by external light reflected by the reflective pixel electrode, and wherein the first rotating order is different from the second rotating order.
    Type: Application
    Filed: March 4, 2021
    Publication date: July 1, 2021
    Inventors: Shunpei YAMAZAKI, Jun KOYAMA, Hiroyuki MIYAKE, Kouhei TOYOTAKA
  • Publication number: 20210167096
    Abstract: An object is to prevent an operation defect and to reduce an influence of fluctuation in threshold voltage of a field-effect transistor. A field-effect transistor, a switch, and a capacitor are provided. The field-effect transistor includes a first gate and a second gate which overlap with each other with a channel formation region therebetween, and the threshold voltage of the field-effect transistor varies depending on the potential of the second gate. The switch has a function of determining whether electrical connection between one of a source and a drain of the field-effect transistor and the second gate of the field-effect transistor is established. The capacitor has a function of holding a voltage between the second gate of the field-effect transistor and the other of the source and the drain of the field-effect transistor.
    Type: Application
    Filed: February 10, 2021
    Publication date: June 3, 2021
    Inventor: Hiroyuki MIYAKE
  • Publication number: 20210167067
    Abstract: It is an object to provide a memory device whose power consumption can be suppressed and a semiconductor device including the memory device. As a switching element for holding electric charge accumulated in a transistor which functions as a memory element, a transistor including an oxide semiconductor film as an active layer is provided for each memory cell in the memory device. The transistor which is used as a memory element has a first gate electrode, a second gate electrode, a semiconductor film located between the first gate electrode and the second gate electrode, a first insulating film located between the first gate electrode and the semiconductor film, a second insulating film located between the second gate electrode and the semiconductor film, and a source electrode and a drain electrode in contact with the semiconductor film.
    Type: Application
    Filed: October 2, 2020
    Publication date: June 3, 2021
    Inventors: Yutaka SHIONOIRI, Hiroyuki MIYAKE, Kiyoshi KATO
  • Patent number: 11009913
    Abstract: A display device with low power consumption is provided. Furthermore, a display device in which an image is displayed in a region that can be used in a folded state is provided. The conceived display device includes a display portion that can be opened and folded, a sensing portion that senses a folded state of the display portion, and an image processing portion that generates, when the display portion is in the folded state, an image in which a black image is displayed in part of the display portion.
    Type: Grant
    Filed: May 22, 2018
    Date of Patent: May 18, 2021
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Yoshiharu Hirakata, Hiroyuki Miyake, Seiko Inoue, Shunpei Yamazaki
  • Publication number: 20210143281
    Abstract: An object is to reduce leakage current and parasitic capacitance of a transistor used for an LSI, a CPU, or a memory. A semiconductor integrated circuit such as an LSI, a CPU, or a memory is manufactured using a thin film transistor in which a channel formation region is formed using an oxide semiconductor which becomes an intrinsic or substantially intrinsic semiconductor by removing impurities which serve as electron donors (donors) from the oxide semiconductor and has larger energy gap than that of a silicon semiconductor. With use of a thin film transistor using a highly purified oxide semiconductor layer with sufficiently reduced hydrogen concentration, a semiconductor device with low power consumption due to leakage current can be realized.
    Type: Application
    Filed: September 2, 2020
    Publication date: May 13, 2021
    Inventors: Shunpei YAMAZAKI, Jun KOYAMA, Hiroyuki MIYAKE, Kei TAKAHASHI, Kouhei TOYOTAKA, Masashi TSUBUKU, Kosei NODA, Hideaki KUWABARA