Abstract: When an interruption instruction occurs in an information processing apparatus including a CPU and a coprocessor, execution of a single dedicated instruction “GETACX Dm,Dn” performs saving of necessary data from all registers. “Dm” is a value output from a general register group 104 to a first data input bus 120. Each of calculation units implemented in a coprocessor 110 recognizes a value stored therein. If a value “Dm” specifies one of the calculation units, the specified calculation unit outputs, to a selector 116, data stored in a register included in the specified calculation unit. An implemented calculation unit information output circuit 117 stores therein the count of the calculation units implemented in the coprocessor 110. If a value of the first data input bus 120 is greater than the count of the calculation units, the implemented calculation unit information output circuit 117 outputs a value “1” to a flag register 102.

Abstract: When an interruption instruction occurs in an information processing apparatus including a CPU and a coprocessor, execution of a single dedicated instruction “GETACX Dm,Dn” performs saving of necessary data from all registers. “Dm” is a value output from a general register group 104 to a first data input bus 120. Each of calculation units implemented in a coprocessor 110 recognizes a value stored therein. If a value “Dm” specifies one of the calculation units, the specified calculation unit outputs, to a selector 116, data stored in a register included in the specified calculation unit. An implemented calculation unit information output circuit 117 stores therein the count of the calculation units implemented in the coprocessor 110. If a value of the first data input bus 120 is greater than the count of the calculation units, the implemented calculation unit information output circuit 117 outputs a value “1” to a flag register 102.

Abstract: An execution program holder holds an execution program that includes execution instructions and configuration instructions that are executed together by a processor. A reconfigurable processing device comprises a programmable device that can reconfigure a circuit, and executes process contents that are instructed through executing the execution instructions by the processor. A circuit information holding and configuration controller holds circuit information that is designated when the processor executes the configuration instructions, and incorporates the reconfigurable processing device with that circuit information to configure a circuit.