Patents by Inventor Hiroyuki Momono
Hiroyuki Momono has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 10199425Abstract: A mask includes a substrate, an effective pixel formation region and a reference pattern formation region. A pixel pattern for forming a pixel component that constitutes a pixel is arranged in the effective pixel formation region. A reference pattern for indicating a reference position where pixel pattern should be arranged in the effective pixel formation region is arranged in the reference pattern formation region. Pixel pattern is arranged to be displaced from the reference position toward a center side of the effective pixel formation region.Type: GrantFiled: October 30, 2017Date of Patent: February 5, 2019Assignee: Renesas Electronics CorporationInventor: Hiroyuki Momono
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Publication number: 20180053807Abstract: A mask includes a substrate, an effective pixel formation region and a reference pattern formation region. A pixel pattern for forming a pixel component that constitutes a pixel is arranged in the effective pixel formation region. A reference pattern for indicating a reference position where pixel pattern should be arranged in the effective pixel formation region is arranged in the reference pattern formation region. Pixel pattern is arranged to be displaced from the reference position toward a center side of the effective pixel formation region.Type: ApplicationFiled: October 30, 2017Publication date: February 22, 2018Applicant: Renesas Electronics CorporationInventor: Hiroyuki MOMONO
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Patent number: 9825084Abstract: A mask includes a substrate, an effective pixel formation region and a reference pattern formation region. A pixel pattern for forming a pixel component that constitutes a pixel is arranged in the effective pixel formation region. A reference pattern for indicating a reference position where pixel pattern should be arranged in the effective pixel formation region is arranged in the reference pattern formation region. Pixel pattern is arranged to be displaced from the reference position toward a center side of the effective pixel formation region.Type: GrantFiled: October 14, 2016Date of Patent: November 21, 2017Assignee: Renesas Electronics CorporationInventor: Hiroyuki Momono
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Publication number: 20170033152Abstract: A mask includes a substrate, an effective pixel formation region and a reference pattern formation region. A pixel pattern for forming a pixel component that constitutes a pixel is arranged in the effective pixel formation region. A reference pattern for indicating a reference position where pixel pattern should be arranged in the effective pixel formation region is arranged in the reference pattern formation region. Pixel pattern is arranged to be displaced from the reference position toward a center side of the effective pixel formation region.Type: ApplicationFiled: October 14, 2016Publication date: February 2, 2017Applicant: Renesas Electronics CorporationInventor: Hiroyuki MOMONO
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Patent number: 9524915Abstract: A mask includes a substrate, an effective pixel formation region and a reference pattern formation region. A pixel pattern for forming a pixel component that constitutes a pixel is arranged in the effective pixel formation region. A reference pattern for indicating a reference position where pixel pattern should be arranged in the effective pixel formation region is arranged in the reference pattern formation region. Pixel pattern is arranged to be displaced from the reference position toward a center side of the effective pixel formation region.Type: GrantFiled: May 4, 2015Date of Patent: December 20, 2016Assignee: Renesas Electronics CorporationInventor: Hiroyuki Momono
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Patent number: 9496191Abstract: A mask includes a substrate, an effective pixel formation region and a reference pattern formation region. A pixel pattern for forming a pixel component that constitutes a pixel is arranged in the effective pixel formation region. A reference pattern for indicating a reference position where pixel pattern should be arranged in the effective pixel formation region is arranged in the reference pattern formation region. Pixel pattern is arranged to be displaced from the reference position toward a center side of the effective pixel formation region.Type: GrantFiled: May 4, 2015Date of Patent: November 15, 2016Assignee: Renesas Electronics CorporationInventor: Hiroyuki Momono
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Publication number: 20160188787Abstract: A solid-state imaging device includes pixels respectively having photoelectric conversion units and arranged in matrix in basic pattern units, and an optical member arranged on the incidence side of incident light than the pixels and having constituent elements respectively corresponding to the pixels. The pixels include first, second and third wavelength range light pixels. Each basic pattern is comprised of a combined arrangement pattern of the wavelength range light pixels. Misregistration constituent elements with the occurrence of misregistration exist in the constituent elements. The misregistration increases toward the misregistration constituent elements separated from a center position of a pixel array of the pixels.Type: ApplicationFiled: March 8, 2016Publication date: June 30, 2016Inventors: Hiroyuki MOMONO, Nobuo TSUBOI
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Patent number: 9373654Abstract: A solid-state imaging device includes pixels respectively having photoelectric conversion units and arranged in matrix in basic pattern units, and an optical member arranged on the incidence side of incident light than the pixels and having constituent elements respectively corresponding to the pixels. The pixels include first, second and third wavelength range light pixels. Each basic pattern is comprised of a combined arrangement pattern of the wavelength range light pixels. Misregistration constituent elements with the occurrence of misregistration exist in the constituent elements. The misregistration increases toward the misregistration constituent elements separated from a center position of a pixel array of the pixels.Type: GrantFiled: October 30, 2014Date of Patent: June 21, 2016Assignee: RENESAS ELECTRONICS CORPORATIONInventors: Hiroyuki Momono, Nobuo Tsuboi
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Publication number: 20150235912Abstract: A mask includes a substrate, an effective pixel formation region and a reference pattern formation region. A pixel pattern for forming a pixel component that constitutes a pixel is arranged in the effective pixel formation region. A reference pattern for indicating a reference position where pixel pattern should be arranged in the effective pixel formation region is arranged in the reference pattern formation region. Pixel pattern is arranged to be displaced from the reference position toward a center side of the effective pixel formation region.Type: ApplicationFiled: May 4, 2015Publication date: August 20, 2015Applicant: Renesas Electronics CorporationInventor: Hiroyuki MOMONO
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Patent number: 9054011Abstract: A mask includes a substrate, an effective pixel formation region and a reference pattern formation region. A pixel pattern for forming a pixel component that constitutes a pixel is arranged in the effective pixel formation region. A reference pattern for indicating a reference position where pixel pattern should be arranged in the effective pixel formation region is arranged in the reference pattern formation region. Pixel pattern is arranged to be displaced from the reference position toward a center side of the effective pixel formation region.Type: GrantFiled: November 14, 2013Date of Patent: June 9, 2015Assignee: Renesas Electronics CorporationInventor: Hiroyuki Momono
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Publication number: 20150123229Abstract: A solid-state imaging device includes pixels respectively having photoelectric conversion units and arranged in matrix in basic pattern units, and an optical member arranged on the incidence side of incident light than the pixels and having constituent elements respectively corresponding to the pixels. The pixels include first, second and third wavelength range light pixels. Each basic pattern is comprised of a combined arrangement pattern of the wavelength range light pixels. Misregistration constituent elements with the occurrence of misregistration exist in the constituent elements. The misregistration increases toward the misregistration constituent elements separated from a center position of a pixel array of the pixels.Type: ApplicationFiled: October 30, 2014Publication date: May 7, 2015Inventors: Hiroyuki MOMONO, Nobuo TSUBOI
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Publication number: 20140145192Abstract: A mask includes a substrate, an effective pixel formation region and a reference pattern formation region. A pixel pattern for forming a pixel component that constitutes a pixel is arranged in the effective pixel formation region. A reference pattern for indicating a reference position where pixel pattern should be arranged in the effective pixel formation region is arranged in the reference pattern formation region. Pixel pattern is arranged to be displaced from the reference position toward a center side of the effective pixel formation region.Type: ApplicationFiled: November 14, 2013Publication date: May 29, 2014Applicant: Renesas Electronics CorporationInventor: Hiroyuki MOMONO
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Patent number: 7956473Abstract: Method of manufacturing semiconductor device including forming inter-layer insulating film on semiconductor substrate. First metal film is formed on inter-layer insulating film. First resist is formed on first metal film and patterned. Anisotropic etching performed on first metal film using first resist as mask. First resist is removed and second metal film is formed on inter-layer insulating film to cover remaining first metal film. Second resist is formed on second metal film in area where first metal film exists on inter-layer insulating film and part of area where first metal film does not exist. Anisotropic etching is performed on second metal film using second resist as mask and bonding pad having first metal film and second metal film, and upper layer wiring having second metal film and not first metal film. Second resist is removed. Surface protection film covering bonding pad is formed. Pad opening is formed on bonding pad.Type: GrantFiled: July 23, 2008Date of Patent: June 7, 2011Assignee: Renesas Electronics CorporationInventors: Hiroyuki Momono, Hiroshi Mitsuyama, Katsuhiro Hasegawa, Keiko Nishitsuji, Kazunobu Miki
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Publication number: 20090026635Abstract: A method of manufacturing a semiconductor device comprises: a step of forming an inter-layer insulating film on a semiconductor substrate; a step of forming a first metal film on the inter-layer insulating film; a step of forming a first resist on the first metal film and patterning the first resist; a step of performing anisotropic etching on the first metal film using the first resist as a mask; a step of removing the first resist; a step of forming a second metal film on the inter-layer insulating film so as to cover the remaining first metal film; a step of forming a second resist on the second metal film in an area where the first metal film exists on the inter-layer insulating film and part of an area where the first metal film does not exist; a step of performing anisotropic etching on the second metal film using the second resist as a mask and forming a bonding pad having the first metal film and the second metal film and an upper layer wiring which has the second metal film, yet not the first metal fType: ApplicationFiled: July 23, 2008Publication date: January 29, 2009Inventors: Hiroyuki MOMONO, Hiroshi Mitsuyama, Katsuhiro Hasegawa, Keiko Nishitsuji, Kazunobu Miki