Patents by Inventor Hiroyuki Momono

Hiroyuki Momono has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10199425
    Abstract: A mask includes a substrate, an effective pixel formation region and a reference pattern formation region. A pixel pattern for forming a pixel component that constitutes a pixel is arranged in the effective pixel formation region. A reference pattern for indicating a reference position where pixel pattern should be arranged in the effective pixel formation region is arranged in the reference pattern formation region. Pixel pattern is arranged to be displaced from the reference position toward a center side of the effective pixel formation region.
    Type: Grant
    Filed: October 30, 2017
    Date of Patent: February 5, 2019
    Assignee: Renesas Electronics Corporation
    Inventor: Hiroyuki Momono
  • Publication number: 20180053807
    Abstract: A mask includes a substrate, an effective pixel formation region and a reference pattern formation region. A pixel pattern for forming a pixel component that constitutes a pixel is arranged in the effective pixel formation region. A reference pattern for indicating a reference position where pixel pattern should be arranged in the effective pixel formation region is arranged in the reference pattern formation region. Pixel pattern is arranged to be displaced from the reference position toward a center side of the effective pixel formation region.
    Type: Application
    Filed: October 30, 2017
    Publication date: February 22, 2018
    Applicant: Renesas Electronics Corporation
    Inventor: Hiroyuki MOMONO
  • Patent number: 9825084
    Abstract: A mask includes a substrate, an effective pixel formation region and a reference pattern formation region. A pixel pattern for forming a pixel component that constitutes a pixel is arranged in the effective pixel formation region. A reference pattern for indicating a reference position where pixel pattern should be arranged in the effective pixel formation region is arranged in the reference pattern formation region. Pixel pattern is arranged to be displaced from the reference position toward a center side of the effective pixel formation region.
    Type: Grant
    Filed: October 14, 2016
    Date of Patent: November 21, 2017
    Assignee: Renesas Electronics Corporation
    Inventor: Hiroyuki Momono
  • Publication number: 20170033152
    Abstract: A mask includes a substrate, an effective pixel formation region and a reference pattern formation region. A pixel pattern for forming a pixel component that constitutes a pixel is arranged in the effective pixel formation region. A reference pattern for indicating a reference position where pixel pattern should be arranged in the effective pixel formation region is arranged in the reference pattern formation region. Pixel pattern is arranged to be displaced from the reference position toward a center side of the effective pixel formation region.
    Type: Application
    Filed: October 14, 2016
    Publication date: February 2, 2017
    Applicant: Renesas Electronics Corporation
    Inventor: Hiroyuki MOMONO
  • Patent number: 9524915
    Abstract: A mask includes a substrate, an effective pixel formation region and a reference pattern formation region. A pixel pattern for forming a pixel component that constitutes a pixel is arranged in the effective pixel formation region. A reference pattern for indicating a reference position where pixel pattern should be arranged in the effective pixel formation region is arranged in the reference pattern formation region. Pixel pattern is arranged to be displaced from the reference position toward a center side of the effective pixel formation region.
    Type: Grant
    Filed: May 4, 2015
    Date of Patent: December 20, 2016
    Assignee: Renesas Electronics Corporation
    Inventor: Hiroyuki Momono
  • Patent number: 9496191
    Abstract: A mask includes a substrate, an effective pixel formation region and a reference pattern formation region. A pixel pattern for forming a pixel component that constitutes a pixel is arranged in the effective pixel formation region. A reference pattern for indicating a reference position where pixel pattern should be arranged in the effective pixel formation region is arranged in the reference pattern formation region. Pixel pattern is arranged to be displaced from the reference position toward a center side of the effective pixel formation region.
    Type: Grant
    Filed: May 4, 2015
    Date of Patent: November 15, 2016
    Assignee: Renesas Electronics Corporation
    Inventor: Hiroyuki Momono
  • Publication number: 20160188787
    Abstract: A solid-state imaging device includes pixels respectively having photoelectric conversion units and arranged in matrix in basic pattern units, and an optical member arranged on the incidence side of incident light than the pixels and having constituent elements respectively corresponding to the pixels. The pixels include first, second and third wavelength range light pixels. Each basic pattern is comprised of a combined arrangement pattern of the wavelength range light pixels. Misregistration constituent elements with the occurrence of misregistration exist in the constituent elements. The misregistration increases toward the misregistration constituent elements separated from a center position of a pixel array of the pixels.
    Type: Application
    Filed: March 8, 2016
    Publication date: June 30, 2016
    Inventors: Hiroyuki MOMONO, Nobuo TSUBOI
  • Patent number: 9373654
    Abstract: A solid-state imaging device includes pixels respectively having photoelectric conversion units and arranged in matrix in basic pattern units, and an optical member arranged on the incidence side of incident light than the pixels and having constituent elements respectively corresponding to the pixels. The pixels include first, second and third wavelength range light pixels. Each basic pattern is comprised of a combined arrangement pattern of the wavelength range light pixels. Misregistration constituent elements with the occurrence of misregistration exist in the constituent elements. The misregistration increases toward the misregistration constituent elements separated from a center position of a pixel array of the pixels.
    Type: Grant
    Filed: October 30, 2014
    Date of Patent: June 21, 2016
    Assignee: RENESAS ELECTRONICS CORPORATION
    Inventors: Hiroyuki Momono, Nobuo Tsuboi
  • Publication number: 20150235912
    Abstract: A mask includes a substrate, an effective pixel formation region and a reference pattern formation region. A pixel pattern for forming a pixel component that constitutes a pixel is arranged in the effective pixel formation region. A reference pattern for indicating a reference position where pixel pattern should be arranged in the effective pixel formation region is arranged in the reference pattern formation region. Pixel pattern is arranged to be displaced from the reference position toward a center side of the effective pixel formation region.
    Type: Application
    Filed: May 4, 2015
    Publication date: August 20, 2015
    Applicant: Renesas Electronics Corporation
    Inventor: Hiroyuki MOMONO
  • Patent number: 9054011
    Abstract: A mask includes a substrate, an effective pixel formation region and a reference pattern formation region. A pixel pattern for forming a pixel component that constitutes a pixel is arranged in the effective pixel formation region. A reference pattern for indicating a reference position where pixel pattern should be arranged in the effective pixel formation region is arranged in the reference pattern formation region. Pixel pattern is arranged to be displaced from the reference position toward a center side of the effective pixel formation region.
    Type: Grant
    Filed: November 14, 2013
    Date of Patent: June 9, 2015
    Assignee: Renesas Electronics Corporation
    Inventor: Hiroyuki Momono
  • Publication number: 20150123229
    Abstract: A solid-state imaging device includes pixels respectively having photoelectric conversion units and arranged in matrix in basic pattern units, and an optical member arranged on the incidence side of incident light than the pixels and having constituent elements respectively corresponding to the pixels. The pixels include first, second and third wavelength range light pixels. Each basic pattern is comprised of a combined arrangement pattern of the wavelength range light pixels. Misregistration constituent elements with the occurrence of misregistration exist in the constituent elements. The misregistration increases toward the misregistration constituent elements separated from a center position of a pixel array of the pixels.
    Type: Application
    Filed: October 30, 2014
    Publication date: May 7, 2015
    Inventors: Hiroyuki MOMONO, Nobuo TSUBOI
  • Publication number: 20140145192
    Abstract: A mask includes a substrate, an effective pixel formation region and a reference pattern formation region. A pixel pattern for forming a pixel component that constitutes a pixel is arranged in the effective pixel formation region. A reference pattern for indicating a reference position where pixel pattern should be arranged in the effective pixel formation region is arranged in the reference pattern formation region. Pixel pattern is arranged to be displaced from the reference position toward a center side of the effective pixel formation region.
    Type: Application
    Filed: November 14, 2013
    Publication date: May 29, 2014
    Applicant: Renesas Electronics Corporation
    Inventor: Hiroyuki MOMONO
  • Patent number: 7956473
    Abstract: Method of manufacturing semiconductor device including forming inter-layer insulating film on semiconductor substrate. First metal film is formed on inter-layer insulating film. First resist is formed on first metal film and patterned. Anisotropic etching performed on first metal film using first resist as mask. First resist is removed and second metal film is formed on inter-layer insulating film to cover remaining first metal film. Second resist is formed on second metal film in area where first metal film exists on inter-layer insulating film and part of area where first metal film does not exist. Anisotropic etching is performed on second metal film using second resist as mask and bonding pad having first metal film and second metal film, and upper layer wiring having second metal film and not first metal film. Second resist is removed. Surface protection film covering bonding pad is formed. Pad opening is formed on bonding pad.
    Type: Grant
    Filed: July 23, 2008
    Date of Patent: June 7, 2011
    Assignee: Renesas Electronics Corporation
    Inventors: Hiroyuki Momono, Hiroshi Mitsuyama, Katsuhiro Hasegawa, Keiko Nishitsuji, Kazunobu Miki
  • Publication number: 20090026635
    Abstract: A method of manufacturing a semiconductor device comprises: a step of forming an inter-layer insulating film on a semiconductor substrate; a step of forming a first metal film on the inter-layer insulating film; a step of forming a first resist on the first metal film and patterning the first resist; a step of performing anisotropic etching on the first metal film using the first resist as a mask; a step of removing the first resist; a step of forming a second metal film on the inter-layer insulating film so as to cover the remaining first metal film; a step of forming a second resist on the second metal film in an area where the first metal film exists on the inter-layer insulating film and part of an area where the first metal film does not exist; a step of performing anisotropic etching on the second metal film using the second resist as a mask and forming a bonding pad having the first metal film and the second metal film and an upper layer wiring which has the second metal film, yet not the first metal f
    Type: Application
    Filed: July 23, 2008
    Publication date: January 29, 2009
    Inventors: Hiroyuki MOMONO, Hiroshi Mitsuyama, Katsuhiro Hasegawa, Keiko Nishitsuji, Kazunobu Miki