Patents by Inventor Hiroyuki Nagatomo

Hiroyuki Nagatomo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10559509
    Abstract: In order to address the problem in that, by increasing the gate resistance of a power semiconductor element, while variation of switching time can be controlled, loss due to the gate resistance becomes larger and power efficiency for the entire system is lowered, the present invention provides an insulating substrate capable of uniformizing switching speeds of circuit elements while suppressing influence on power efficiency of the circuit elements. In the insulating substrate according to the present invention, part of a wiring layer is formed as a control signal circuit layer, and part of the control signal circuit layer is formed as a resistance layer that increases input resistance when the circuit element receives a control signal.
    Type: Grant
    Filed: August 9, 2017
    Date of Patent: February 11, 2020
    Assignee: Hitachi Metals, Ltd.
    Inventors: Hiroshi Hozoji, Kenji Hayashi, Hiroyuki Itoh, Hisayuki Imamura, Hiroyuki Nagatomo
  • Patent number: 10518818
    Abstract: A vehicle body structure of a vehicle includes a joint (20) formed by joining body parts such that the body parts overlap each other. The joint (20) includes a plurality of spot joints (21) and an adhesive joint (22). An adhesive has a storage modulus in the range of 100 MPa to 800 MPa and a loss factor of 0.2 or more at a temperature of 20° C. and an exciting force frequency of 60 Hz.
    Type: Grant
    Filed: August 21, 2018
    Date of Patent: December 31, 2019
    Assignee: MAZDA MOTOR CORPORATION
    Inventors: Tomoya Yoshida, Ryuji Nonaka, Hiroyuki Nagatomo
  • Publication number: 20190318988
    Abstract: A wafer for mounting substrates according to the present disclosure includes a multilayer ceramic substrate including top face electrodes, bottom face electrodes, and internal electrodes providing connection between the top face electrodes and the bottom face electrodes, and a wiring pattern formed on a top face of the multilayer ceramic substrate. The wiring pattern has a minimum line width which is equal to or less than 2 ?m and a minimum line space which is equal to or less than 2 ?m. When the wafer for mounting substrates is zoned into a plurality of regions by the units of 20 mm×20 mm, at least 50% of the regions satisfy the condition that an SFQR in 20 mm×20 mm evaluation region be equal to or less than 2 ?m, at the top face of the multilayer ceramic substrate.
    Type: Application
    Filed: June 26, 2019
    Publication date: October 17, 2019
    Inventors: Hiroyuki NAGATOMO, Junichi MASUKAWA
  • Publication number: 20190221489
    Abstract: In order to address the problem in that, by increasing the gate resistance of a power semiconductor element, while variation of switching time can be controlled, loss due to the gate resistance becomes larger and power efficiency for the entire system is lowered, the present invention provides an insulating substrate capable of uniformizing switching speeds of circuit elements while suppressing influence on power efficiency of the circuit elements. In the insulating substrate according to the present invention, part of a wiring layer is formed as a control signal circuit layer, and part of the control signal circuit layer is formed as a resistance layer that increases input resistance when the circuit element receives a control signal.
    Type: Application
    Filed: August 9, 2017
    Publication date: July 18, 2019
    Applicant: HITACHI METALS, LTD.
    Inventors: Hiroshi HOZOJI, Kenji HAYASHI, Hiroyuki ITOH, Hisayuki IMAMURA, Hiroyuki NAGATOMO
  • Publication number: 20190061833
    Abstract: A vehicle body structure of a vehicle includes a joint (20) formed by joining body parts such that the body parts overlap each other. The joint (20) includes a plurality of spot joints (21) and an adhesive joint (22). An adhesive has a storage modulus in the range of 100 MPa to 800 MPa and a loss factor of 0.2 or more at a temperature of 20° C. and an exciting force frequency of 60 Hz.
    Type: Application
    Filed: August 21, 2018
    Publication date: February 28, 2019
    Applicant: MAZDA MOTOR CORPORATION
    Inventors: Tomoya YOSHIDA, Ryuji NONAKA, Hiroyuki NAGATOMO
  • Patent number: 9899113
    Abstract: A method for producing a scintillator dual array comprising the steps of bonding first and second scintillator bar arrays having different sensitivity distributions of X-ray energy detection and pluralities of parallel grooves with equal gaps, via an intermediate resin layer, such that both scintillator bars are aligned in a lamination direction, cutting the integrally bonded bar array in a direction crossing the scintillator bars, and coating one cut surface of each bonded bar array piece with a resin.
    Type: Grant
    Filed: March 7, 2013
    Date of Patent: February 20, 2018
    Assignee: HITACHI METALS, LTD.
    Inventors: Hideo Nitta, Akira Shigekawa, Satoshi Shiota, Hiroyuki Nagatomo
  • Patent number: 9773738
    Abstract: Provided is a circuit substrate for a semiconductor package used for mounting a plurality of semiconductor devices. The circuit substrate including: a first circuit substrate unit; and a second circuit substrate unit that is formed on the first circuit substrate unit, wherein Young's modulus of a first dielectric material composing the dielectric layer of the first circuit substrate unit is higher than Young's modulus of a second dielectric material composing the dielectric layer of the second circuit substrate unit, and a coefficient of thermal expansion of the first dielectric material composing the dielectric layer of the first circuit substrate unit is smaller than a coefficient of thermal expansion of the second dielectric material composing the dielectric layer of the second circuit substrate unit.
    Type: Grant
    Filed: October 2, 2015
    Date of Patent: September 26, 2017
    Assignee: Hitachi Metals, Ltd.
    Inventors: Yutaka Uematsu, Hiroyuki Nagatomo, Junichi Masukawa
  • Publication number: 20160211205
    Abstract: A wafer for mounting substrates according to the present disclosure includes a multilayer ceramic substrate including top face electrodes, bottom face electrodes, and internal electrodes providing connection between the top face electrodes and the bottom face electrodes, and a wiring pattern formed on a top face of the multilayer ceramic substrate. The wiring pattern has a minimum line width which is equal to or less than 2 ?m and a minimum line space which is equal to or less than 2 ?m. When the wafer for mounting substrates is zoned into a plurality of regions by the units of 20 mm×20 mm, at least 50% of the regions satisfy the condition that an SFQR in 20 mm×20 mm evaluation region be equal to or less than 2 ?m, at the top face of the multilayer ceramic substrate.
    Type: Application
    Filed: August 25, 2014
    Publication date: July 21, 2016
    Inventors: Hiroyuki NAGATOMO, Junichi MASUKAWA
  • Publication number: 20160099197
    Abstract: Provided is a circuit substrate for a semiconductor package used for mounting a plurality of semiconductor devices. The circuit substrate including: a first circuit substrate unit; and a second circuit substrate unit that is formed on the first circuit substrate unit, wherein Young's modulus of a first dielectric material composing the dielectric layer of the first circuit substrate unit is higher than Young's modulus of a second dielectric material composing the dielectric layer of the second circuit substrate unit, and a coefficient of thermal expansion of the first dielectric material composing the dielectric layer of the first circuit substrate unit is smaller than a coefficient of thermal expansion of the second dielectric material composing the dielectric layer of the second circuit substrate unit.
    Type: Application
    Filed: October 2, 2015
    Publication date: April 7, 2016
    Inventors: Yutaka UEMATSU, Hiroyuki NAGATOMO, Junichi MASUKAWA
  • Publication number: 20150033541
    Abstract: A method for producing a scintillator dual array comprising the steps of bonding first and second scintillator bar arrays having different sensitivity distributions of X-ray energy detection and pluralities of parallel grooves with equal gaps, via an intermediate resin layer, such that both scintillator bars are aligned in a lamination direction, cutting the integrally bonded bar array in a direction crossing the scintillator bars, and coating one cut surface of each bonded bar array piece with a resin.
    Type: Application
    Filed: March 7, 2013
    Publication date: February 5, 2015
    Applicant: HITACHI METALS, LTD.
    Inventors: Hideo Nitta, Akira Shigekawa, Satoshi Shiota, Hiroyuki Nagatomo
  • Patent number: 7505646
    Abstract: An optical switch includes an input optical fiber, first and second output optical fibers, a movable mirror for switching over an optical path between the input optical fiber and an output optical fiber, and collimator lenses disposed on optical paths formed between the input optical fiber and the output optical fibers. When drive force is applied, the movable mirror assumes a first or second position to form an optical path between the input optical fiber and the first or second output optical fiber. When drive force is not applied to the movable mirror, an optical path is formed between the optical path in the first position and that in the second position. In the first position, a first part of the movable mirror comes in contact with a substrate. In the second position, a part of the movable mirror different from the first part comes in contact with the substrate.
    Type: Grant
    Filed: March 31, 2006
    Date of Patent: March 17, 2009
    Assignee: Hitachi Metals, Ltd.
    Inventors: Yukio Katou, Masaya Horino, Masatoshi Kanamaru, Yasuhiro Hamaguchi, Hiroyuki Nagatomo
  • Publication number: 20060219879
    Abstract: An optical switch includes an input optical fiber, first and second output optical fibers, a movable mirror for switching over an optical path between the input optical fiber and an output optical fiber, and collimator lenses disposed on optical paths formed between the input optical fiber and the output optical fibers. When drive force is applied, the movable mirror assumes a first or second position to form an optical path between the input optical fiber and the first or second output optical fiber. When drive force is not applied to the movable mirror, an optical path is formed between the optical path in the first position and that in the second position. In the first position, a first part of the movable mirror comes in contact with a substrate. In the second position, a part of the movable mirror different from the first part comes in contact with the substrate.
    Type: Application
    Filed: March 31, 2006
    Publication date: October 5, 2006
    Inventors: Yukio Katou, Masaya Horino, Masatoshi Kanamaru, Yasuhiro Hamaguchi, Hiroyuki Nagatomo
  • Patent number: 6775070
    Abstract: A collimator lens which makes it possible to limit the direction in which the optical axis of the light discharged from the collimator lens deviates to a specific direction and to accomplish alignment easily is to be provided.
    Type: Grant
    Filed: October 9, 2002
    Date of Patent: August 10, 2004
    Assignee: Hitachi Metals, Ltd.
    Inventors: Masaru Suzuki, Hiroyuki Nagatomo
  • Publication number: 20030072533
    Abstract: A collimator lens which makes it possible to limit the direction in which the optical axis of the light discharged from the collimator lens deviates to a specific direction and to accomplish alignment easily is to be provided.
    Type: Application
    Filed: October 9, 2002
    Publication date: April 17, 2003
    Applicant: HITACHI METALS, LTD.
    Inventors: Masaru Suzuki, Hiroyuki Nagatomo
  • Patent number: 5617391
    Abstract: An optical recording and reproducing system has an optical recording and reproducing head driving arrangement including an optical pick-up and has an optical recording medium provided between the recording heads. The optical recording and reproducing head is mounted on a rotating arrangement. The head scans tracks while a relative position of the recording medium and rotating arrangement is changed. Each track has an address recorded at the beginning of scanning and a hold signal at the end of scanning. The recording and reproducing heads are separated one track. The recording head makes recording while the reproducing head makes reproduction. In the recording or reproducing mode of operation, the track address is looked. If wrong, it is corrected. The hold signal is detected to operate a tracking device and focusing device. Scanning the next track is determined by the address before tracking is made for recording or reproduction.
    Type: Grant
    Filed: January 25, 1995
    Date of Patent: April 1, 1997
    Assignee: Hitachi, Ltd.
    Inventors: Seiji Ono, Kenmei Masuda, Katsuo Konishi, Hiroyuki Nagatomo