Patents by Inventor Hiroyuki NOGAWA

Hiroyuki NOGAWA has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240363508
    Abstract: A semiconductor module includes: a semiconductor element; a housing for housing the semiconductor element, the housing including a terminal hole; a terminal in the terminal hole and being electrically connected to the semiconductor element; a holding member bonded by an adhesive to the housing; and a potting material in the housing, in which the terminal includes a plate-shaped leg between the holding member and the housing including a recess for accommodating the leg, the recess has a depth greater than a thickness of the leg, in the recess, a portion of the leg in a direction of length of the leg is provided with a passage for the adhesive, the passage being across the leg in a direction of thickness of the leg, and a width of the passage is greater than a difference between the depth of the recess and the thickness of the leg.
    Type: Application
    Filed: February 21, 2024
    Publication date: October 31, 2024
    Applicant: FUJI ELECTRIC CO., LTD.
    Inventor: Hiroyuki NOGAWA
  • Publication number: 20240030211
    Abstract: A semiconductor module includes at least, a conductive pattern on the insulating substrate; a first semiconductor element on the conductive pattern, a second semiconductor element on the conductive pattern, a first power collecting portion connected to a first output electrode of the first semiconductor element with a first line; and a second power collecting portion connected to a second output electrode of the second semiconductor element with a second line. Each of the first and second semiconductor elements includes both a switching element and a diode. The conductive pattern is provided between the first power collecting portion and the second power collecting portion. A current path length from a first output electrode of the first semiconductor element to the first power collecting portion and a current path length from a second output electrode of the second semiconductor element to the second power collecting portion are equal to each other.
    Type: Application
    Filed: June 28, 2023
    Publication date: January 25, 2024
    Applicant: FUJI ELECTRIC CO., LTD.
    Inventor: Hiroyuki NOGAWA
  • Publication number: 20230402336
    Abstract: Provided is a semiconductor module including: a reverse conducting first switching element which is provided on one of an upper arm and a lower arm; a reverse conducting second switching element which is provided on another of the upper arm and the lower arm; a first path member which is electrically connected to one of a gate electrode and an emitter electrode of the first switching element; and a second path member which is electrically connected to another of the gate electrode and the emitter electrode of the first switching element. The first path member is provided to be closer to the second switching element than the second path member, and current flowing through the first path member flows in antiparallel with a reverse recovery current of an arm provided with the second switching element.
    Type: Application
    Filed: August 22, 2023
    Publication date: December 14, 2023
    Inventor: Hiroyuki NOGAWA
  • Patent number: 11587861
    Abstract: A semiconductor device including an insulating circuit board. The insulating circuit board has an insulating plate, a plurality of circuit patterns disposed on a front surface of the insulating plate, any adjacent two of the circuit patterns having a gap therebetween, each circuit pattern having at least one corner, each corner being in a corner area that covers the corner and a portion of each gap adjacent to the corner, and a buffer material containing resin, applied at a plurality of corner areas, to fill the gaps in the plurality of corner areas.
    Type: Grant
    Filed: January 22, 2021
    Date of Patent: February 21, 2023
    Assignee: FUJI ELECTRIC CO., LTD.
    Inventor: Hiroyuki Nogawa
  • Patent number: 11531075
    Abstract: An improved system for measuring current within a power semiconductor module is disclosed, where the system is integrated within the power module. The system includes a point field detector sensing a magnetic field resulting from current flowing in one phase of the module. A lead frame conductor may be provided to shape the magnetic field and minimize the influence of cross-coupled magnetic fields from currents conducted in other power semiconductor devices within one phase of the module. Optionally, a second point field detector may be provided at a second location within the module to sense a magnetic field resulting from the current flowing in the same phase of the module. Each phase of the power module includes at least one point field detector. A decoupling circuit is provided to decouple multiple currents flowing within the same phase or to decouple currents flowing within different phases of the power module.
    Type: Grant
    Filed: August 9, 2021
    Date of Patent: December 20, 2022
    Assignee: Wisconsin Alumni Research Foundation
    Inventors: Robert D. Lorenz, Minhao Sheng, Hiroyuki Nogawa, Yoshinari Ikeda, Eiji Mochizuki
  • Publication number: 20210364581
    Abstract: An improved system for measuring current within a power semiconductor module is disclosed, where the system is integrated within the power module. The system includes a point field detector sensing a magnetic field resulting from current flowing in one phase of the module. A lead frame conductor may be provided to shape the magnetic field and minimize the influence of cross-coupled magnetic fields from currents conducted in other power semiconductor devices within one phase of the module. Optionally, a second point field detector may be provided at a second location within the module to sense a magnetic field resulting from the current flowing in the same phase of the module. Each phase of the power module includes at least one point field detector. A decoupling circuit is provided to decouple multiple currents flowing within the same phase or to decouple currents flowing within different phases of the power module.
    Type: Application
    Filed: August 9, 2021
    Publication date: November 25, 2021
    Inventors: Robert D. Lorenz, Minhao Sheng, Hiroyuki Nogawa, Yoshinari Ikeda, Eiji Mochizuki
  • Publication number: 20210305144
    Abstract: A semiconductor device including an insulating circuit board. The insulating circuit board has an insulating plate, a plurality of circuit patterns disposed on a front surface of the insulating plate, any adjacent two of the circuit patterns having a gap therebetween, each circuit pattern having at least one corner, each corner being in a corner area that covers the corner and a portion of each gap adjacent to the corner, and a buffer material containing resin, applied at a plurality of corner areas, to fill the gaps in the plurality of corner areas.
    Type: Application
    Filed: January 22, 2021
    Publication date: September 30, 2021
    Applicant: FUJI ELECTRIC CO., LTD.
    Inventor: Hiroyuki NOGAWA
  • Patent number: 11085977
    Abstract: An improved system for measuring current within a power semiconductor module is disclosed, where the system is integrated within the power module. The system includes a point field detector sensing a magnetic field resulting from current flowing in one phase of the module. A lead frame conductor may be provided to shape the magnetic field and minimize the influence of cross-coupled magnetic fields from currents conducted in other power semiconductor devices within one phase of the module. Optionally, a second point field detector may be provided at a second location within the module to sense a magnetic field resulting from the current flowing in the same phase of the module. Each phase of the power module includes at least one point field detector. A decoupling circuit is provided to decouple multiple currents flowing within the same phase or to decouple currents flowing within different phases of the power module.
    Type: Grant
    Filed: May 15, 2017
    Date of Patent: August 10, 2021
    Assignee: Wisconsin Alumni Research Foundation
    Inventors: Robert D. Lorenz, Minhao Sheng, Hiroyuki Nogawa, Yoshinari Ikeda, Eiji Mochizuki
  • Publication number: 20180329002
    Abstract: An improved system for measuring current within a power semiconductor module is disclosed, where the system is integrated within the power module. The system includes a point field detector sensing a magnetic field resulting from current flowing in one phase of the module. A lead frame conductor may be provided to shape the magnetic field and minimize the influence of cross-coupled magnetic fields from currents conducted in other power semiconductor devices within one phase of the module. Optionally, a second point field detector may be provided at a second location within the module to sense a magnetic field resulting from the current flowing in the same phase of the module. Each phase of the power module includes at least one point field detector. A decoupling circuit is provided to decouple multiple currents flowing within the same phase or to decouple currents flowing within different phases of the power module.
    Type: Application
    Filed: May 15, 2017
    Publication date: November 15, 2018
    Inventors: Robert D. Lorenz, Minhao Sheng, Hiroyuki Nogawa, Yoshinari Ikeda, Eiji Mochizuki
  • Patent number: 10090223
    Abstract: A semiconductor device includes a heat-dissipating base, a first conductive layer bonded to the top surface of the heat-dissipating base, an AlN insulating substrate bonded to the top surface of the first conductive layer, and an electrode terminal having one edge bending to form a bonding edge whose bottom surface faces the top surface of the second conductive layer and is solid-state bonded to a portion of the top surface of the second conductive layer. The crystal grain diameter at the bonded interface of the second conductive layer and electrode terminal is less than or equal to 1 ?m, and indentations from the ultrasonic horn are left in the top surface of the bonding edge.
    Type: Grant
    Filed: March 8, 2017
    Date of Patent: October 2, 2018
    Assignee: FUJI ELECTRIC CO., LTD.
    Inventors: Fumihiko Momose, Hiroyuki Nogawa, Yoshitaka Nishimura, Eiji Mochizuki
  • Publication number: 20170317008
    Abstract: A semiconductor device includes a heat-dissipating base, a first conductive layer bonded to the top surface of the heat-dissipating base, an AlN insulating substrate bonded to the top surface of the first conductive layer, and an electrode terminal having one edge bending to form a bonding edge whose bottom surface faces the top surface of the second conductive layer and is solid-state bonded to a portion of the top surface of the second conductive layer. The crystal grain diameter at the bonded interface of the second conductive layer and electrode terminal is less than or equal to 1 ?m, and indentations from the ultrasonic horn are left in the top surface of the bonding edge.
    Type: Application
    Filed: March 8, 2017
    Publication date: November 2, 2017
    Applicant: Fuji Electric Co., Ltd.
    Inventors: Fumihiko MOMOSE, Hiroyuki NOGAWA, Yoshitaka NISHIMURA, Eiji MOCHIZUKI