Patents by Inventor Hiroyuki Okimoto

Hiroyuki Okimoto has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8741983
    Abstract: Antifouling coating compositions that do not substantially contain cuprous oxide and organotins, and that comprise: A) a metal-containing copolymer obtained by copolymerization of a polymerizable unsaturated monomer (a1) containing a metal and an unsaturated monomer (a2) capable of radical polymerization containing no metals; (B) 4,5-dichloro-2-n-octyl-4-isothiazolin-3-one; and (C) a metal pyrithione compound.
    Type: Grant
    Filed: December 18, 2002
    Date of Patent: June 3, 2014
    Assignee: Chugoku Marine Paints, Ltd.
    Inventors: Hiroyuki Okimoto, Yasuo Mukunoki, Toshihiko Ashida, Masashi Ono
  • Publication number: 20050065232
    Abstract: An antifouling coating composition substantially not containing cuprous oxide and organotins, characterized by comprising (A) a metal-containing copolymer obtained by copolymerization of a polymerizable unsaturated monomer (a1) containing a metal and an unsaturated monomer (a2) capable of radical polymerization containing no metals; (B) 4,5-dichloro-2-n-octyl-4-isothiazolin-3-one; and (C) a metal pyrithione compound. There are provided an antifouling coating composition, antifouling coating film and, covered with the antifouling coating film, marine vessel, underwater structure and fishing gear or fishing net, which can reduce burdens on the environment, exhibiting excellent antifouling performance, and which excel in not only uniform wasting of coating film but also capability of maintaining antifouling performance of coating film for a prolonged period of time.
    Type: Application
    Filed: December 18, 2002
    Publication date: March 24, 2005
    Applicant: CHUGOKU MARINE PAINTS, LTD.
    Inventors: Hiroyuki Okimoto, Yasuo Mukunoki, Toshihiko Ashida, Masashi Ono
  • Patent number: 5668650
    Abstract: A thin film transistor panel comprises a substrate, pixel electrodes arranged on the substrate in a matrix form, TFTs each having a source electrode connected to the associated pixel electrode, gate lines and data lines, both connected to the associated TFTs. An auxiliary electrode connected to the associated gate line and a capacitance compensation electrode are provided in such a manner as to cancel a change in gate-source capacitance caused by an alignment error in the manufacturing process. The capacitance compensation electrode is shifted by the same amount as the shift of the source electrode. When the facing area between the gate electrode and source electrode increases (or decreases) due to an alignment error in the manufacturing process, the facing area between the auxiliary electrode and capacitance compensation electrode decreases (or increases).
    Type: Grant
    Filed: November 25, 1996
    Date of Patent: September 16, 1997
    Assignee: Casio Computer Co., Ltd.
    Inventors: Hisatoshi Mori, Hiroyuki Okimoto
  • Patent number: 5519521
    Abstract: A liquid crystal display device comprises a first substrate on which a plurality of thin-film transistors, a plurality of pixel electrodes respectively connected to the thin-film transistors, a plurality of gate lines for connecting gate electrodes of the thin-film transistors, and a plurality of drain lines for connecting drain electrodes of the thin-film transistors are arranged in a matrix pattern, a second substrate on which a plurality of divisional common electrodes which face the plurality of pixel electrodes are formed, and a liquid crystal material encapsulated by the first and second substrates and a sealing member, and interposed between the plurality of pixel electrodes and the plurality of divisional common electrodes. The matrix pattern on the first substrate is formed by a photolithograpy process comprising a step of divisionally exposing photoresist in a plurality of divisional regions by using a stepper.
    Type: Grant
    Filed: May 17, 1993
    Date of Patent: May 21, 1996
    Assignee: Casio Computer Co., Ltd.
    Inventors: Hiroyuki Okimoto, Syunichi Sato
  • Patent number: 5504348
    Abstract: A thin film transistor array comprises an insulative substrate, a plurality of pixel electrodes arranged in a matrix on the insulative substrate, a plurality of thin film transistors connected respectively to the pixel electrodes, a plurality of address lines formed on the insulative substrate, each address line being connected to a plurality of control electrodes of the thin film transistors, and a plurality of data lines arranged on the insulative substrate in such a manner as to intersect the address lines, each data line being connected to a plurality of data input electrodes of the thin film transistors. A short-wiring is formed on the outside of a display region on the insulative substrate on which the pixel electrodes are arranged, and the short-wiring is connected to at least two of the address lines and the data lines by a two-terminal element having non-linear resistance characteristics defining voltage/current characteristics on the basis of a space charge limited current.
    Type: Grant
    Filed: March 20, 1995
    Date of Patent: April 2, 1996
    Assignees: Casio Computer Co., Ltd., Oki Electric Industry Co., Ltd.
    Inventors: Mamoru Yoshida, Makoto Sasaki, Hiroyuki Okimoto, Tsutomu Nomoto, Shunichi Sato
  • Patent number: 5424753
    Abstract: A display device has first and second substrates, a liquid-crystal layer, pixel electrodes arranged on the first substrate, a plurality of semiconductor active elements connected to the pixel electrodes, signal lines for supplying drive signals to the active elements, and a plurality of opposing electrodes arranged on the second substrate. Each pixel electrode, that portion of each opposing electrode which overlaps the pixel electrode, and that portion of the liquid-crystal layer which is sandwiched between the pixel electrode and said that portion of the opposing electrode form a pixel. A voltage having a positive or negative value according to the image data is applied between the input terminal of the semiconductor active element and said at least one of the opposing electrode, for a selecting period.
    Type: Grant
    Filed: December 9, 1993
    Date of Patent: June 13, 1995
    Assignee: Casio Computer Co., Ltd.
    Inventors: Katsumi Kitagawa, Hiroyuki Okimoto, Shyunichi Sato
  • Patent number: 5148301
    Abstract: A liquid crystal display device comprises first and second substrates disposed to face each other, first and second electrodes formed on the both substrates to opposed to each other and forming a display region, signal leads formed on the second substrate and connected to the second electrodes, a seal surrounding the display region between the substrates and connecting together the substrates, a driving circuit provided between outer edges of the display region and those of the seal and connected to the leads, for generating a driving signal and supplying the signal to the wires in response to externally input display data, and a liquid crystal material sealed in a space surrounded by the substrates and seal.
    Type: Grant
    Filed: February 21, 1991
    Date of Patent: September 15, 1992
    Assignee: Casio Computer Co., Ltd.
    Inventors: Takeshi Sawatsubashi, Atsushi Mawatari, Hiroyuki Okimoto