Patents by Inventor Hiroyuki Oshima

Hiroyuki Oshima has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5714771
    Abstract: An active matrix panel including a matrix of driving electrodes couples through thin film transistor switches to a corresponding source line and gate line and at least one of a driver circuit including complementary thin film transistors for driving the source and/or gate lines of the picture elements on the substrate. The thin film transistors of the active matrix have the same cross-sectional structure as the P-type or the N-type thin film transistors forming the driver circuit and are formed during the same patterning process.
    Type: Grant
    Filed: September 26, 1996
    Date of Patent: February 3, 1998
    Assignee: Seiko Epson Corporation
    Inventors: Toshiyuki Misawa, Hiroyuki Oshima
  • Patent number: 5698864
    Abstract: Thin film transistors including polycrystalline silicon or amorphous silicon thin film channel regions having a thickness of between about 100 .ANG. and 2500 .ANG. which are thinner than at least a portion of the source and drain regions and active matrix assemblies including thin film transistors for improved electro-optical displays are provided.
    Type: Grant
    Filed: May 26, 1995
    Date of Patent: December 16, 1997
    Assignee: Seiko Epson Corporation
    Inventors: Toshihiko Mano, Toshimoto Kodaira, Hiroyuki Oshima
  • Patent number: 5677547
    Abstract: Improved thin film transistors resistant to static electricity induced line faults are provided. The thin film transistors formed in accordance with the invention are particularly well suited for use in an active matrix substrate for a liquid crystal display panel. The liquid crystal display panels include an additional layer formed between crossing source lines and gate lines to provide a higher breakdown voltage between the source lines and gate lines than at the gate insulating layer of the thin film transistors or at a display capacitor.
    Type: Grant
    Filed: June 5, 1995
    Date of Patent: October 14, 1997
    Assignee: Seiko Epson Corporation
    Inventors: Toshimoto Kodaira, Hiroyuki Oshima, Toshihiko Mano
  • Patent number: 5677212
    Abstract: An active matrix panel including a matrix of driving electrodes couples through thin film transistor switches to a corresponding source line and gate line and at least one of a driver circuit including complementary thin film transistors for driving the source and/or gate lines of the picture elements on the substrate. The thin film transistors of the active matrix have the same cross-sectional structure as the P-type or the N-type thin film transistors forming the driver circuit and are formed during the same patterning process.
    Type: Grant
    Filed: May 31, 1995
    Date of Patent: October 14, 1997
    Assignee: Seiko Epson Corporation
    Inventors: Toshiyuki Misawa, Hiroyuki Oshima
  • Patent number: 5656826
    Abstract: An active matrix panel including a matrix of driving electrodes couples through thin film transistor switches to a corresponding source line and gate line and at least one of a driver circuit including complementary thin film transistors for driving the source and/or gate lines of the picture elements on the substrate. The thin film transistors of the active matrix have the same cross-sectional structure as the P-type or the N-type thin film transistors forming the driver circuit and are formed during the same patterning process.
    Type: Grant
    Filed: March 28, 1995
    Date of Patent: August 12, 1997
    Assignee: Seiko Epson Corporation
    Inventors: Toshiyuki Misawa, Hiroyuki Oshima
  • Patent number: 5650637
    Abstract: Improved thin film transistors resistant to photo-induced current and having improved electrical contact between electrodes and the source or drain regions are provided. The thin film transistors formed in accordance with the invention are particularly well suited for use in an active matrix substrate for a liquid crystal display panel. The liquid crystal display panels include an additional insulating layer formed between crossing orthogonal source lines and gate lines to provide a higher breakdown voltage between the source lines and gate lines than at the gate insulating layer of the thin film transistors.
    Type: Grant
    Filed: March 20, 1995
    Date of Patent: July 22, 1997
    Assignee: Seiko Epson Corporation
    Inventors: Toshimoto Kodaira, Hiroyuki Oshima, Toshihiko Mano
  • Patent number: 5648685
    Abstract: An active matrix panel including a matrix of driving electrodes couples through thin film transistor switches to a corresponding source line and gate line and at least one of a driver circuit including complementary thin film transistors for driving the source and/or gate lines of the picture elements on the substrate. The thin film transistors of the active matrix have the same cross-sectional structure as the P-type or the N-type thin film transistors forming the driver circuit and are formed during same patterning process.
    Type: Grant
    Filed: May 11, 1995
    Date of Patent: July 15, 1997
    Assignee: Seiko Epson Corporation
    Inventors: Toshiyuki Misawa, Hiroyuki Oshima
  • Patent number: 5616936
    Abstract: An active matrix panel including a matrix of driving electrodes couples through thin film transistor switches to a corresponding source line and gate line and at least one of a driver circuit including complementary thin film transistors for driving the source and/or gate lines of the picture elements on the substrate. The thin film transistors of the active matrix have the same cross-sectional structure as the P-type or the N-type thin film transistors forming the driver circuit and are formed during the same patterning process.
    Type: Grant
    Filed: March 10, 1995
    Date of Patent: April 1, 1997
    Assignee: Seiko Epson Corporation
    Inventors: Toshiyuki Misawa, Hiroyuki Oshima
  • Patent number: 5591990
    Abstract: An active matrix panel including a matrix of driving electrodes couples through thin film transistor switches to a corresponding source line and gate line and at least one of a driver circuit including complementary thin film transistors for driving the source and/or gate lines of the picture elements on the substrate. The thin film transistors of the active matrix have the same cross-sectional structure as the P-type or the N-type thin film transistors forming the driver circuit and are formed during the same patterning process.
    Type: Grant
    Filed: June 5, 1995
    Date of Patent: January 7, 1997
    Assignee: Seiko Epson Corporation
    Inventors: Toshiyuki Misawa, Hiroyuki Oshima
  • Patent number: 5583347
    Abstract: An active matrix panel including a matrix of driving electrodes couples through thin film transistor switches to a corresponding source line and gate line and at least one of a driver circuit including complementary thin film transistors for driving the source and/or gate lines of the picture elements on the substrate. The thin film transistors of the active matrix have the same cross-sectional structure as the P-type or the N-type thin film transistors forming the driver circuit and are formed during the same patterning process.
    Type: Grant
    Filed: March 13, 1995
    Date of Patent: December 10, 1996
    Assignee: Seiko Epson Corporation
    Inventors: Toshiyuki Misawa, Hiroyuki Oshima
  • Patent number: 5573959
    Abstract: Improved thin film transistors resistant to photo-induced current and having improved electrical contact between electrodes and the source or drain regions are provided. The thin film transistors formed in accordance with the invention are particularly well suited for use in an active matrix substrate for a liquid crystal display panel. The liquid crystal display panels include an additional insulating layer formed between crossing orthogonal source lines and gate lines to provide a higher breakdown voltage between the source lines and gate lines than at the gate insulating layer of the thin film transistors.
    Type: Grant
    Filed: May 19, 1995
    Date of Patent: November 12, 1996
    Assignee: Seiko Epson Corporation
    Inventors: Toshimoto Kodaira, Hiroyuki Oshima, Toshihiko Mano
  • Patent number: 5554861
    Abstract: Thin file transistor including polycrystalline silicon or amorphous silicon thin film channel regions having a thickness of between about 100 .ANG. and 2500 .ANG. which are thinner than at least a portion of the source and drain regions and active matrix assemblies including thin film transistors for improved electro-optical displays are provided.
    Type: Grant
    Filed: February 14, 1995
    Date of Patent: September 10, 1996
    Assignee: Seiko Epson Corporation
    Inventors: Toshihiko Mano, Toshimoto Kodaira, Hiroyuki Oshima
  • Patent number: 5552615
    Abstract: Improved thin film transistors resistant to photo-induced current and having improved electrical contact between electrodes and the source or drain regions are provided. The thin film transistors formed in accordance with the invention are particularly well suited for use in an active matrix substrate for a liquid crystal display panel. The liquid crystal display panels include an additional insulating layer formed between crossing orthogonal source lines and gate lines to provide a higher breakdown voltage between the source lines and gate lines than at the gate insulating layer of the thin film transistors.
    Type: Grant
    Filed: March 23, 1995
    Date of Patent: September 3, 1996
    Assignee: Seiko Epson Corporation
    Inventors: Toshimoto Kodaira, Hiroyuki Oshima, Toshihiko Mano
  • Patent number: 5474942
    Abstract: Improved thin film transistors resistant to photo-induced current and having improved electrical contact between electrodes and the source or drain regions are provided. The thin film transistors formed in accordance with the invention are particularly well suited for use in an active matrix substrate for a liquid crystal display panel. The liquid crystal display panels include an additional insulating layer formed between crossing orthogonal source lines and gate lines to provide a higher breakdown voltage between the source lines and gate lines than at the gate insulating layer of the thin film transistors.
    Type: Grant
    Filed: May 3, 1994
    Date of Patent: December 12, 1995
    Assignee: Seiko Epson Corporation
    Inventors: Toshimoto Kodaira, Hiroyuki Oshima, Toshihiko Mano
  • Patent number: 5365079
    Abstract: Improved thin film transistors resistant to photo-induced current and having improved electrical contact between electrodes and the source or drain regions are provided. The thin film transistors formed in accordance with the invention are particularly well suited for use in an active matrix substrate for a liquid crystal display panel. The liquid crystal display panels include an additional insulating layer formed between crossing orthogonal source lines and gate lines to provide a higher breakdown voltage between the source lines and gate lines than at the gate insulating layer of the thin film transistors.
    Type: Grant
    Filed: February 5, 1993
    Date of Patent: November 15, 1994
    Assignee: Seiko Epson Corporation
    Inventors: Toshimoto Kodaira, Hiroyuki Oshima, Toshihiko Mano
  • Patent number: 5341012
    Abstract: An active matrix panel including a matrix of driving electrodes couples through thin film transistor switches to a corresponding source line and gate line and at least one of a driver circuit including complementary thin film transistors for driving the source and/or gate lines of the picture elements on the substrate. The thin film transistors of the active matrix have the same cross-sectional structure as the P-type or the N-type thin film transistors forming the driver circuit and are formed during the same patterning process.
    Type: Grant
    Filed: July 31, 1992
    Date of Patent: August 23, 1994
    Assignee: Seiko Epson Corporation
    Inventors: Toshiyuki Misawa, Hiroyuki Oshima
  • Patent number: 5274279
    Abstract: A CMOS device includes a substrate. A thin silicon film is disposed on the substrate and has a P-type thin film transistor and an N-type thin film transistor formed on the thin silicon film. The P-type thin film transistor and the N-type thin film transistor are coupled together in a CMOS configuration.
    Type: Grant
    Filed: July 31, 1992
    Date of Patent: December 28, 1993
    Assignee: Seiko Epson Corporation
    Inventors: Toshiyuki Misawa, Hiroyuki Oshima
  • Patent number: 5250931
    Abstract: An active matrix panel including a matrix of driving electrodes couples through thin film transistor switches to a corresponding source line and gate line and at least one of a driver circuit including complementary thin film transistors for driving the source and/or gate lines of the picture elements on the substrate. The thin film transistors of the active matrix have the same cross-sectional structure as the P-type or the N-type thin film transistors forming the driver circuit and are formed during the same patterning process.
    Type: Grant
    Filed: May 15, 1989
    Date of Patent: October 5, 1993
    Assignee: Seiko Epson Corporation
    Inventors: Toshiyuki Misawa, Hiroyuki Oshima
  • Patent number: 5191027
    Abstract: A novel composition is disclosed comprising an alicyclic epoxy compound formed by an epoxidation reaction of a polymerized cyclo olefin compound having double bonds with an epoxidating agent.A cured epoxy resin according to the present invention has excellent heat resistance, outdoor durability, and water resistance, attributable to the absence of ether units derived from the ring-opening of epoxy groups and hydroxyl groups derived from an initiating agent.
    Type: Grant
    Filed: May 11, 1990
    Date of Patent: March 2, 1993
    Assignee: Daicel Chemical Industries, Ltd.
    Inventors: Takaaki Fujiwa, Ikuo Takahashi, Hiroyuki Oshima
  • Patent number: 5140091
    Abstract: Disclosed are a composition comprising polyether compounds, obtained by addition copolymerization of a mixture of 4-vinylcyclohexene-1-oxide and a compound having at least two epoxy groups with a compound having at least one active hydrogen atom, and a composition comprising epoxy compounds obtained by epoxidation of the composition of the polyether compounds. The invention also relates to processes for production thereof.The disclosed composition comprising epoxy compounds has a higher softening temperature compared that produced by polymerization of only 4-vinylcyclohexene-1-oxide with a compound having at least one active hydrogen atom.
    Type: Grant
    Filed: December 20, 1990
    Date of Patent: August 18, 1992
    Assignee: Daicel Chemical Industries Ltd.
    Inventors: Katsuhisa Sakai, Hiroyuki Oshima