Patents by Inventor Hiroyuki Ryu

Hiroyuki Ryu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8971611
    Abstract: A mask correcting unit corrects an externally set mask pattern. A depth map processing unit processes a depth map of an input image for each of a plurality of regions designated by a plurality of mask patterns corrected by the mask correcting unit. An image generation unit generates an image of a different viewpoint on the basis of the input image and depth maps processed by the depth map processing unit. The mask correcting unit performs a blurring process on an object boundary part of the mask pattern.
    Type: Grant
    Filed: February 6, 2013
    Date of Patent: March 3, 2015
    Assignee: JVC KENWOOD Corporation
    Inventors: Hiroshi Takeshita, Toshifumi Mori, Masaki Ishikawa, Satoshi Ishizaka, Hiroyuki Ryu, Yuji Nishi
  • Patent number: 6617527
    Abstract: A printed circuit board includes an insulative substrate. A first conductive layer having a predetermined width and length is formed on the insulative substrate, the first conductive layer extending in a first direction. A first insulative layer is formed over the first conductive layer. A circuit pattern having a narrower width than that of the first conductive layer is provided in parallel with the first direction of the first conductive layer, the circuit pattern being formed on the first insulative layer. A second insulative layer is formed over the circuit pattern. A pair of grooves is formed alongside the entire length of both sides of the circuit pattern and in the first and second insulative layers so as to expose the first conductive layer, the pair of grooves extending in a second direction parallel to the first direction so as to sandwich the circuit pattern there between.
    Type: Grant
    Filed: October 3, 2001
    Date of Patent: September 9, 2003
    Assignee: Victor Company of Japan, Limited
    Inventors: Masahiro Ozeki, Motoshi Shindoh, Hiroyuki Ryu
  • Publication number: 20020060090
    Abstract: In a printed circuit board comprising an insulative substrate 20, a first conductive layer 22 and a first insulative layer 23 formed on the insulative substrate 20 in order, a circuit pattern 25 provided in parallel with the longitudinal direction of the first conductive layer 22 and a second insulative layer 26, the printed circuit board is further composed of a plurality of grooves 27L and 27R formed on both sides of the circuit pattern 25 in the first and second insulative layers 23 and 26 so as to expose the first conductive layer 22 and a second conductive layer 28, which is formed on the second insulative layer 26 continuously from an inner wall of the one groove 27L to an inner wall of the other groove 27R so as to connect to the conductive layer 22. The conductive layer 28 connected to the conductive layer 22 through the first and second insulative layers 23 and 26 forms a structure of surrounding the circuit pattern 25.
    Type: Application
    Filed: October 3, 2001
    Publication date: May 23, 2002
    Applicant: Victor Company of Japan, Ltd.
    Inventors: Masahiro Ozeki, Motoshi Shindoh, Hiroyuki Ryu