Abstract: The present invention provides an epitaxial substrate for field effect transistor. In the epitaxial substrate for field effect transistor, a nitride-based Group III-V semiconductor epitaxial crystal containing Ga is interposed between the ground layer and the operating layer, and the nitride-based Group III-V semiconductor epitaxial crystal includes the following (i), (ii) and (iii). (i) a first buffer layer containing Ga or Al and containing a high resistivity crystal layer having added thereto compensation impurity element present in the same period as Ga in the periodic table and having small atomic number; (ii) a second buffer layer containing Ga or Al, laminated on the operating layer side of the first buffer layer; and (iii) a high purity epitaxial crystal layer containing acceptor impurities in a slight amount such that non-addition or depletion state can be maintained, provided between the high resistivity layer and the operating layer.

Abstract: To provide a semiconductor wafer having a wafer, a compound semiconductor layer, a first insulating layer and a second insulating layer, wherein in the depth direction, oxygen atoms and nitrogen atoms are continuously distributed, the number of the nitrogen atoms along the depth direction shows its maximum in the first insulating layer, the total number of third atoms and fourth atoms along the depth direction becomes the largest in the compound semiconductor layer, the number of the oxygen atoms at the interface between the compound semiconductor layer and the first insulating layer is smaller than the number of the oxygen atoms at the interface between the first insulating layer and the second insulating layer.

Abstract: A semiconductor wafer includes first and second superlattice layers. The first superlattice layer includes first unit layers each of which includes first and second layers, the second superlattice layer includes second unit layers each of which includes third and fourth layers, the first layer is made of Alx1Ga1-x1N (0<x1?1), the second layer is made of Aly1Ga1-y1N (0?y1<1, x1>y1), the third layer is made of Alx2Ga1-x2N (0<x2?1), the fourth layer is made of Aly2Ga1-y2N (0?y2<1, x2>y2), an average lattice constant of the first superlattice layer is different from that of the second superlattice layer, and one or more layers selected from the first and second superlattice layers contain impurity atoms that improve a breakdown voltage and that have a concentration higher than 7×1018 [atoms/cm3].

Abstract: To provide a semiconductor wafer having a wafer, a compound semiconductor layer, a first insulating layer and a second insulating layer, wherein in the depth direction, oxygen atoms and nitrogen atoms are continuously distributed, the number of the nitrogen atoms along the depth direction shows its maximum in the first insulating layer, the total number of third atoms and fourth atoms along the depth direction becomes the largest in the compound semiconductor layer, the number of the oxygen atoms at the interface between the compound semiconductor layer and the first insulating layer is smaller than the number of the oxygen atoms at the interface between the first insulating layer and the second insulating layer.

Abstract: A method for producing a compound semiconductor crystal, includes; a sacrificial layer formation step of forming a sacrificial layer containing Cx1Siy1Gez1Sn1-x1-y1-z1 (0?x1<1, 0?y1?1, 0?z1?1, and 0<x1+y1+z1?1), on a base wafer whose surface is made of a silicon crystal; a crystal formation step of forming, on the sacrificial layer, a compound semiconductor crystal lattice-matching or pseudo lattice-matching the sacrificial layer; and a crystal removal step of removing the compound semiconductor crystal from the base wafer, by etching the sacrificial layer.

Abstract: The present invention provides a gallium nitride type epitaxial crystal, a method for producing the crystal, and a field effect transistor using the crystal. The gallium nitride type epitaxial crystal comprises a base substrate and the following (a) to (e), wherein a connection layer comprising a gallium nitride type crystal is arranged in an opening of the non-gallium nitride type insulating layer to electrically connect the first buffer layer and the p-conductive type semiconductor crystal layer. (a) a gate layer, (b) a high purity first buffer layer containing a channel layer contacting an interface on the base substrate side of the gate layer, (c) a second buffer layer arranged on the base substrate side of the first buffer layer, (d) a non-gallium nitride type insulating layer arranged on the base substrate side of the second buffer layer, and having the opening at a part thereof, and (e) a p-conductive type semiconductor crystal layer arranged on the base substrate side of the insulating layer.

Abstract: Provided is a method of producing a semiconductor wafer. The method includes forming an alignment mark on a base wafer, forming, on the base wafer in a region that includes the alignment mark, an inhibition layer for inhibiting crystal growth after forming the alignment mark, forming, in a region of the inhibition layer where no alignment mark is provided, an opening in which the base wafer is exposed, on the basis of information that indicates a location where the opening is to be formed with reference to the position of the alignment mark, and growing a semiconductor crystal inside the opening.

Abstract: Provided is a semiconductor wafer including: a base wafer whose surface is made of a silicon crystal: a SixGe1-xC (0?x<1) epitaxial crystal formed in a partial area of the silicon crystal; and a Group 3 nitride semiconductor crystal formed on the SixGe1-xC (0?x<1) epitaxial crystal. In one example, the semiconductor wafer includes an inhibitor that is formed on the silicon crystal, contains an aperture exposing the silicon crystal, and inhibits crystal growth, and the SixGe1-xC (0?x<1) epitaxial crystal is formed in the aperture.

Abstract: A method for producing a compound semiconductor crystal, includes; a sacrificial layer formation step of forming a sacrificial layer containing Cx1Siy1Gez1Sn1-x1-y1-z1 (0?x1<1, 0?y1?1, 0?z1?1, and 0<x1+y1+z1?1), on a base wafer whose surface is made of a silicon crystal; a crystal formation step of forming, on the sacrificial layer, a compound semiconductor crystal lattice-matching or pseudo lattice-matching the sacrificial layer; and a crystal removal step of removing the compound semiconductor crystal from the base wafer, by etching the sacrificial layer.

Abstract: There is provided a light emitting device that includes a base wafer that contains silicon, a plurality of seed bodies provided in contact with the base wafer, and a plurality of Group 3-5 compound semiconductors that are each lattice-matched or pseudo-lattice-matched to corresponding seed bodies. In the device, a light emitting element that emits light in response to current supplied thereto is formed in at least one of the plurality of the Group 3-5 compound semiconductors, and a current limiting element that limits the current supplied to the light emitting element is formed in at least one of the plurality of the Group 3-5 compound semiconductors other than the Group 3-5 compound semiconductor in which the light emitting element is formed.

Abstract: The present invention provides a method for manufacturing a gallium nitride semiconductor epitaxial crystal substrate with a dielectric film which has a low gate leak current and negligibly low gate lag, drain lag, and current collapse characteristics. The method for manufacturing a semiconductor epitaxial crystal substrate is a method for manufacturing a semiconductor epitaxial crystal substrate in which a dielectric layer of a nitride dielectric material or an oxide dielectric material in an amorphous form functioning as a passivation film or a gate insulator is provided on a surface of a nitride semiconductor crystal layer grown by metal organic chemical vapor deposition. In the method, after the nitride semiconductor crystal layer is grown in an epitaxial growth chamber, the dielectric layer is grown on the nitride semiconductor crystal layer in the epitaxial growth chamber.

Abstract: The object of the present invention is to increase channel current density while a GaN-based field effect transistor operates in a normally-off mode. Provided is a semiconductor device comprising a group 3-5 compound semiconductor channel layer containing nitrogen, an electron supply layer that supplies electrons to the channel layer, a semiconductor layer that is formed on a side of the electron supply layer opposite the side facing the channel layer and that is an intrinsic or n-type group 3-5 compound semiconductor containing nitrogen, and a control electrode that is formed to contact the semiconductor layer or formed with an intermediate layer interposed between itself and the semiconductor layer.

Abstract: It is an objective of the present invention to increase channel current density while allowing a GaN field effect transistor to perform normally-off operation. Provided is a a semiconductor device comprising a group 3-5 compound semiconductor channel layer including nitrogen; an electron supply layer that has a groove in a surface thereof that is opposite a surface facing the channel layer and that supplies the channel layer with electrons; a p-type semiconductor layer that is formed in the groove of the electron supply layer; and a control electrode formed directly on the p-type semiconductor layer or on an intermediate layer formed on the p-type semiconductor layer.

Abstract: A gallium nitride based field effect transistor having good current hysteresis characteristics in which forward gate leakage can be reduced. In a gallium nitride-based field effect transistor (100) having a gate insulation film (108), part or all of a material constituting the gate insulation film (108) is a dielectric material having a relative dielectric constant of 9-22, and a semiconductor crystal layer A (104) in contact with the gate insulation film (108) and a semiconductor crystal layer B (103) in the vicinity of the semiconductor crystal layer A (104) and having a larger electron affinity than the semiconductor crystal layer A (104) constitute a hetero junction. A hafnium oxide such as HfO2, HfAlO, HfAlON or HfSiO is preferably contained, at least partially, in the material constituting the gate insulation film (108).

Abstract: Provided are a semiconductor device, a semiconductor device manufacturing method, a high carrier mobility transistor and a light emitting device. The semiconductor device is provided with a semiconductor layer including N and Ga, a conductive layer ohmic-connected to the semiconductor layer, a metal-distributed region where metal exists by being distributed at an interface between the semiconductor layer and the conductive layer, and a metal intrusion region where the atoms of the metal exist by entering the semiconductor layer.

Abstract: An epitaxial crystal for a field effect transistor which has a nitride-based III-V group semiconductor epitaxial crystal grown on a SiC single crystal base substrate having micropipes by use of an epitaxial growth method, wherein at least a part of the micropipes spreading from the SiC single crystal base substrate into the epitaxial crystal terminate between an active layer of the transistor and the SiC single crystal base substrate.

Abstract: The present invention provides a gallium nitride type epitaxial crystal, a method for producing the crystal, and a field effect transistor using the crystal. The gallium nitride type epitaxial crystal comprises a base substrate and the following (a) to (e), wherein a connection layer comprising a gallium nitride type crystal is arranged in an opening of the non-gallium nitride type insulating layer to electrically connect the first buffer layer and the p-conductive type semiconductor crystal layer. (a) a gate layer, (b) a high purity first buffer layer containing a channel layer contacting an interface on the base substrate side of the gate layer, (c) a second buffer layer arranged on the base substrate side of the first buffer layer, (d) a non-gallium nitride type insulating layer arranged on the base substrate side of the second buffer layer, and having the opening at a part thereof, and (e) a p-conductive type semiconductor crystal layer arranged on the base substrate side of the insulating layer.

Abstract: The present invention provides a method for manufacturing a gallium nitride semiconductor epitaxial crystal substrate with a dielectric film which has a low gate leak current and negligibly low gate lag, drain lag, and current collapse characteristics. The method for manufacturing a semiconductor epitaxial crystal substrate is a method for manufacturing a semiconductor epitaxial crystal substrate in which a dielectric layer of a nitride dielectric material or an oxide dielectric material in an amorphous form functioning as a passivation film or a gate insulator is provided on a surface of a nitride semiconductor crystal layer grown by metal organic chemical vapor deposition. In the method, after the nitride semiconductor crystal layer is grown in an epitaxial growth chamber, the dielectric layer is grown on the nitride semiconductor crystal layer in the epitaxial growth chamber.

Abstract: The present invention provides an epitaxial substrate for field effect transistor. In the epitaxial substrate for field effect transistor, a nitride-based Group III-V semiconductor epitaxial crystal containing Ga is interposed between the ground layer and the operating layer, and the nitride-based Group III-V semiconductor epitaxial crystal comprises the following (i), (ii) and (iii). (i) a first buffer layer containing Ga or Al and containing a high resistivity crystal layer having added thereto compensation impurity element present in the same period as Ga in the periodic table and having small atomic number; (ii) a second buffer layer containing Ga or Al, laminated on the operating layer side of the first buffer layer; and (iii) a high purity epitaxial crystal layer containing acceptor impurities in a slight amount such that non-addition or depletion state can be maintained, provided between the high resistivity layer and the operating layer.

Abstract: An epitaxial crystal for a field effect transistor which has a nitride-based III-V group semiconductor epitaxial crystal grown on a SiC single crystal base substrate having micropipes by use of an epitaxial growth method, wherein at least a part of the micropipes spreading from the SiC single crystal base substrate into the epitaxial crystal terminate between an active layer of the transistor and the SiC single crystal base substrate.