Patents by Inventor Hiroyuki Senzai
Hiroyuki Senzai has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 9472439Abstract: Provided are a reinforcing sheet which is capable of forming a secondary mounted semiconductor device excellent in impact resistance and which is capable of enhancing efficiency of a secondary mounting process; and a method for producing a secondary mounted semiconductor device using the reinforcing sheet. The present invention provides a reinforcing sheet for reinforcing a secondary mounted semiconductor device in which a primary mounted semiconductor device with a bump electrode formed on a first main surface is electrically connected to a wiring substrate through the bump electrode, wherein the reinforcing sheet includes a base material layer, a pressure-sensitive adhesive layer, and a thermosetting resin layer in this order, and the pressure-sensitive adhesive layer has a breaking strength of 0.07 MPa or more, and a melt viscosity of 4000 Pa·s or less at 60 to 100° C.Type: GrantFiled: March 12, 2014Date of Patent: October 18, 2016Assignee: NITTO DENKO CORPORATIONInventors: Naohide Takamoto, Kosuke Morita, Hiroyuki Senzai
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Patent number: 9368421Abstract: The present invention provides an under-fill material with which a semiconductor device having a high connection reliability can be provided while securing a usable material by reducing a difference in thermal-responsive behavior between a semiconductor element and an adherend, and a method for producing a semiconductor device using the under-fill material. In the under-fill material of the present invention, a storage elastic modulus E? [MPa] and a thermal expansion coefficient ? [ppm/K] after carrying out a heat-curing treatment at 175° C. for an hour satisfy the following formula (1) at 25° C.: E?×?<250000 [Pa/K]??(1).Type: GrantFiled: June 5, 2015Date of Patent: June 14, 2016Assignee: NITTO DENKO CORPORATIONInventors: Kosuke Morita, Naohide Takamoto, Hiroyuki Senzai
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Publication number: 20160042986Abstract: Provided are a reinforcing sheet which is capable of forming a secondary mounted semiconductor device excellent in impact resistance and which is capable of enhancing efficiency of a secondary mounting process; and a method for producing a secondary mounted semiconductor device using the reinforcing sheet. The present invention provides a reinforcing sheet for reinforcing a secondary mounted semiconductor device in which a primary mounted semiconductor device with a bump electrode formed on a first main surface is electrically connected to a wiring substrate through the bump electrode, wherein the reinforcing sheet includes a base material layer, a pressure-sensitive adhesive layer, and a thermosetting resin layer in this order, and the pressure-sensitive adhesive layer has a breaking strength of 0.07 MPa or more, and a melt viscosity of 4000 Pa·s or less at 60 to 100° C.Type: ApplicationFiled: March 12, 2014Publication date: February 11, 2016Inventors: Naohide Takamoto, Kosuke Morita, Hiroyuki Senzai
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Patent number: 9202795Abstract: Provided is a laminated film wherein the space between semiconductor elements that are three-dimensionally mounted can be filled easily and securely. The laminated film of the present invention is a laminated film for filling the space between semiconductor elements that are electrically connected through a member or connection, the film including a dicing sheet in which a pressure-sensitive adhesive layer is laminated on a base material and a curable film that is laminated on the pressure-sensitive adhesive layer, wherein the curable film has a lowest melt viscosity at 50 to 200° C. of 1×102 Pa·s or more and 1×104 Pa·s or less.Type: GrantFiled: June 21, 2012Date of Patent: December 1, 2015Assignee: NITTO DENKO CORPORATIONInventors: Takashi Oda, Naohide Takamoto, Hiroyuki Senzai
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Publication number: 20150270188Abstract: The present invention provides an under-fill material with which a semiconductor device having a high connection reliability can be provided while securing a usable material by reducing a difference in thermal-responsive behavior between a semiconductor element and an adherend, and a method for producing a semiconductor device using the under-fill material. In the under-fill material of the present invention, a storage elastic modulus E? [MPa] and a thermal expansion coefficient ? [ppm/K] after carrying out a heat-curing treatment at 175° C. for an hour satisfy the following formula (1) at 25° C.: E?×?<250000[Pa/K]??(1).Type: ApplicationFiled: June 5, 2015Publication date: September 24, 2015Inventors: Kosuke Morita, Naohide Takamoto, Hiroyuki Senzai
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Patent number: 9085685Abstract: The present invention provides an under-fill material with which a semiconductor device having a high connection reliability can be provided while securing a usable material by reducing a difference in thermal-responsive behavior between a semiconductor element and an adherend, and a method for producing a semiconductor device using the under-fill material. In the under-fill material of the present invention, a storage elastic modulus E? [MPa] and a thermal expansion coefficient ? [ppm/K] after carrying out a heat-curing treatment at 175° C. for an hour satisfy the following formula (1) at 25° C.: E?×?<250000 [Pa/K]??(1).Type: GrantFiled: November 27, 2012Date of Patent: July 21, 2015Assignee: NITTO DENKO CORPORATIONInventors: Kosuke Morita, Naohide Takamoto, Hiroyuki Senzai
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Publication number: 20150104649Abstract: The present invention provides a laminated sheet that can prevent the decrease in adhering strength of a resin composition layer and the deterioration in electrical reliability and in which a back grinding tape can be peeled from a plurality of semiconductor elements collectively after dicing. The laminated sheet has a back grinding tape in which a pressure-sensitive adhesive layer is formed on a base, and a resin composition layer that is provided on the pressure-sensitive adhesive layer of the back grinding tape, wherein the tensile modulus of the pressure-sensitive adhesive layer at 23° C. is 0.1 to 5.0 MPa, and the T-peeling strength between the pressure-sensitive adhesive layer and the resin composition layer is 0.1 to 5 N/20 mm at 23° C. and 300 mm/min.Type: ApplicationFiled: December 22, 2014Publication date: April 16, 2015Inventors: Hiroyuki Senzai, Shumpei Tanaka, Koji Mizuno
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Patent number: 8951843Abstract: The present invention provides a laminated sheet that can prevent the decrease in adhering strength of a resin composition layer and the deterioration in electrical reliability and in which a back grinding tape can be peeled from a plurality of semiconductor elements collectively after dicing. The laminated sheet has a back grinding tape in which a pressure-sensitive adhesive layer is formed on a base, and a resin composition layer that is provided on the pressure-sensitive adhesive layer of the back grinding tape, wherein the tensile modulus of the pressure-sensitive adhesive layer at 23° C. is 0.1 to 5.0 MPa, and the T-peeling strength between the pressure-sensitive adhesive layer and the resin composition layer is 0.1 to 5 N/20 mm at 23° C. and 300 mm/min.Type: GrantFiled: December 12, 2012Date of Patent: February 10, 2015Assignee: Nitto Denko CorporationInventors: Hiroyuki Senzai, Shumpei Tanaka, Koji Mizuno
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Patent number: 8420510Abstract: Provided is a method of manufacturing a semiconductor device wherein the space between semiconductor elements that are three-dimensionally mounted can be filled easily and securely. The method of manufacturing a semiconductor device of the present invention includes preparing a semiconductor wafer with a plurality of members for connection formed on both first and second surfaces; preparing a laminated film including a dicing sheet with a pressure-sensitive adhesive layer laminated on a base material, and a curable film that is laminated on the pressure-sensitive adhesive layer and has a thickness equivalent to or more than the height of the member for connection on the first surface; pasting the curable film of the laminated film to the semiconductor wafer while facing the curable film to the first surface so that the members for connection are not exposed to the pressure-sensitive adhesive layer; and dicing the semiconductor wafer to form a semiconductor element.Type: GrantFiled: June 21, 2012Date of Patent: April 16, 2013Assignee: Nitto Denko CorporationInventors: Takashi Oda, Naohide Takamoto, Hiroyuki Senzai
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Publication number: 20120326280Abstract: Provided is a laminated film wherein the space between semiconductor elements that are three-dimensionally mounted can be filled easily and securely. The laminated film of the present invention is a laminated film for filling the space between semiconductor elements that are electrically connected through a member or connection, the film including a dicing sheet in which a pressure-sensitive adhesive layer is laminated on a base material and a curable film that is laminated on the pressure-sensitive adhesive layer, wherein the curable film has a lowest melt viscosity at 50 to 200° C. of 1×102 Pa·s or more and 1×104 Pa·s or less.Type: ApplicationFiled: June 21, 2012Publication date: December 27, 2012Applicant: NITTO DENKO CORPORATIONInventors: Takashi Oda, Naohide Takamoto, Hiroyuki Senzai
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Publication number: 20120329250Abstract: Provided is a method of manufacturing a semiconductor device wherein the space between semiconductor elements that are three-dimensionally mounted can be filled easily and securely. The method of manufacturing a semiconductor device of the present invention includes preparing a semiconductor wafer with a plurality of members for connection formed on both first and second surfaces; preparing a laminated film including a dicing sheet with a pressure-sensitive adhesive layer laminated on a base material, and a curable film that is laminated on the pressure-sensitive adhesive layer and has a thickness equivalent to or more than the height of the member for connection on the first surface; pasting the curable film of the laminated film to the semiconductor wafer while facing the curable film to the first surface so that the members for connection are not exposed to the pressure-sensitive adhesive layer; and dicing the semiconductor wafer to form a semiconductor element.Type: ApplicationFiled: June 21, 2012Publication date: December 27, 2012Applicant: NITTO DENKO CORPORATIONInventors: Takashi Oda, Naohide Takamoto, Hiroyuki Senzai
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Publication number: 20120205820Abstract: Provided are an encapsulating resin sheet having improved a connection reliability by improving a connection failure, and by suppressing intrusion of an inorganic filler between terminals of the semiconductor element and the interconnection circuit substrate, a semiconductor device using the same, and a fabricating method for the semiconductor device. The encapsulating resin sheet is an epoxy resin composition sheet having a two-layer structure of an inorganic filler containing layer and an inorganic filler non-containing layer, in which a melt viscosity of the inorganic filler containing layer is 1.0×102 to 2.0×104 Pa·s, a melt viscosity of the inorganic filler non-containing layer is 1.0×103 to 2.0×105 Pa·s, a viscosity difference between both layers is 1.5×104 Pa·s or more; and a thickness of the inorganic filler non-containing layer is ? to ? of a height of the connecting electrode portion formed in the semiconductor element.Type: ApplicationFiled: February 2, 2012Publication date: August 16, 2012Applicant: NITTO DENKO CORPORATIONInventors: Takashi Oda, Kosuke Morita, Hiroyuki Senzai