Abstract: A calibration method for calibrating a semiconductor testing apparatus before mounting semiconductor devices for performing a testing of electric characteristics thereof, the testing apparatus having a driver which generates and outputs a signal, and a socket with a plurality of terminals for receiving pins and transferring signals therethrough. The calibration method includes mounting a test board having a plurality of pins onto the socket and connecting each of the pins of the test board with a respective terminal of the socket, transferring the signal of the driver to the terminals of the test board, detecting the signal of the driver that has reached the test board, and setting an output timing of the signal of the driver based on the signal detected.

Abstract: An output circuit capable of high-speed operation, large current output, and low power consumption. The output circuit includes an input transistor for receiving an input signal, a pair of output transistors for supplying an output signal to the load at a desired current level, a resistor network provided between the output transistors, a level shift circuit for shifting a bias voltage of the input transistor to determine a bias voltage of the output transistors thereby defining bias current in the output transistors, and an inverse current circuit for supplying a current to the resistor network which is opposite to the current supplied from the output transistor when the output current from one of the output transistors to the load exceeds the predetermined value.

Abstract: A leakage current correcting circuit for reducing a leakage current flowing into an output of a circuit in a high impedance state. The configuration includes a correcting unit having a current detecting circuit for detecting a leakage current and outputting a current equal to a detected leakage current, and a current supply circuit for receiving the output current from the current detecting circuit as an input and causing a current for offsetting the leakage current flowing into the output of the circuit in a high impedance state.

Abstract: A programmable load circuit is constructed from two current sources that serve as loads of a device under test, a diode bridge to which is impressed a threshold voltage for selecting the load and which is connected to the input/output pins of the device under test, a first switch and a second switch for connecting to the diode bridge the appropriate current source according to output of the device under test, two constant-voltage sources for charging and discharging parasitic capacitance of the diode bridge, and a third switch and a fourth switch that connect the constant-voltage sources and the diode bridge when the device under test is in a signal-inputting state.

Abstract: A driver circuit for a semiconductor test system generates test signals having predetermined voltage levels without being affected by stray capacitances.