Patents by Inventor Hiroyuki SINDO

Hiroyuki SINDO has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10180317
    Abstract: In order to provide a pattern-measuring device and a computer program that quantitatively evaluate the effects brought about by the presence of pattern deformations in a circuit, this invention proposes a pattern-measuring device that measures first distances between first edges in pattern data being measured and second edges that correspond to said first edges in a benchmark pattern that corresponds to the pattern being measured. Said pattern-measuring device computes a score for the first edges or the pattern being measured on the basis of the first distances and second distances between the first edges and/or the second edges and third edges that are adjacent to but different from the first and second edges.
    Type: Grant
    Filed: January 7, 2015
    Date of Patent: January 15, 2019
    Assignee: Hitachi High-Technologies Corporation
    Inventors: Yasutaka Toyoda, Hiroyuki Sindo
  • Patent number: 9947088
    Abstract: An object of the present invention is to provide an evaluation condition setting method and an evaluation condition setting apparatus of a semiconductor device which can select an appropriate evaluation pattern for exposure condition management with high accuracy. In order to solve the object, the present invention proposes an evaluation condition setting method or an evaluation condition setting apparatus which excludes a pattern corresponding to a process window chart defining a process window range smaller than a predetermined process window range from a measurement target, in a plurality of the process window charts which are obtained based on scanning of a charged particle beam with respect to another pattern formed on a sample.
    Type: Grant
    Filed: July 21, 2016
    Date of Patent: April 17, 2018
    Assignee: Hitachi High-Technologies Corporation
    Inventors: Hiroyuki Sindo, Kaoru Fukaya
  • Publication number: 20170032212
    Abstract: An object of the present invention is to provide an evaluation condition setting method and an evaluation condition setting apparatus of a semiconductor device which can select an appropriate evaluation pattern for exposure condition management with high accuracy. In order to solve the object, the present invention proposes an evaluation condition setting method or an evaluation condition setting apparatus which excludes a pattern corresponding to a process window chart defining a process window range smaller than a predetermined process window range from a measurement target, in a plurality of the process window charts which are obtained based on scanning of a charged particle beam with respect to another pattern formed on a sample.
    Type: Application
    Filed: July 21, 2016
    Publication date: February 2, 2017
    Inventors: Hiroyuki SINDO, Kaoru FUKAYA
  • Publication number: 20160356598
    Abstract: In order to provide a pattern-measuring device and a computer program that quantitatively evaluate the effects brought about by the presence of pattern deformations in a circuit, this invention proposes a pattern-measuring device that measures first distances between first edges in pattern data being measured and second edges that correspond to said first edges in a benchmark pattern that corresponds to the pattern being measured. Said pattern-measuring device computes a score for the first edges or the pattern being measured on the basis of the first distances and second distances between the first edges and/or the second edges and third edges that are adjacent to but different from the first and second edges.
    Type: Application
    Filed: January 7, 2015
    Publication date: December 8, 2016
    Inventors: Yasutaka TOYODA, Hiroyuki SINDO