Patents by Inventor Hiroyuki Tachibana

Hiroyuki Tachibana has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7342558
    Abstract: The initializing period of at least one of a plurality of sub-fields constituting one field is a selective initializing period for selectively initializing discharge cells in which a sustain discharge has occurred in the sustaining period of the preceding sub-field. In the sustaining period of the sub-field prior to the sub-field including the selective initializing period, voltage Vr is applied to a priming electrode (PRi) for causing a discharge between the priming electrode (PRi) and corresponding scan electrode (SCi) using the priming electrode (PRi) as a cathode.
    Type: Grant
    Filed: March 23, 2004
    Date of Patent: March 11, 2008
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Hiroyuki Tachibana, Naoki Kosugi, Toshikazu Wakabayashi, Yasuaki Muto
  • Patent number: 7330165
    Abstract: A method drives a plasma display panel including priming electrodes. In the writing period of a sub-field, prior to the scanning of respective scan electrodes, priming discharge is caused between the scan electrodes and the priming electrodes. The time interval between the application of voltage to the priming electrodes for causing the priming discharge and the scanning of the corresponding scan electrodes is set within 10 ?s.
    Type: Grant
    Filed: March 23, 2004
    Date of Patent: February 12, 2008
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Hiroyuki Tachibana, Naoki Kosugi, Nobuaki Nagao, Ryuichi Murai
  • Patent number: 7298349
    Abstract: A method of driving a plasma display panel including a plurality of priming electrodes. The pulse width of scan pulses applied to some of a plurality of scan electrodes in which writing is performed and priming discharge is caused with the scanning of the scan electrodes is larger than the pulse width of scan pulses applied to the other scan electrodes in which writing is performed but no priming discharge is caused with the scanning of the scan electrodes.
    Type: Grant
    Filed: March 23, 2004
    Date of Patent: November 20, 2007
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Hiroyuki Tachibana, Toshikazu Wakabayashi, Shigeo Kigo, Nobuaki Nagao, Kenji Ogawa
  • Publication number: 20070222706
    Abstract: A method of driving a plasma display panel having display electrode pairs each one of which pairs is formed of a scan electrode and a sustain electrode. A priming electrode is placed in every other spaces between the display electrode pairs and in parallel with the display electrode pairs. An addressing period includes an odd-line addressing period in which an address operation is conducted to primary discharge cells having odd-number scan electrodes, an even-line addressing period in which an address operation is conducted to primary discharge cells having even-number scan electrodes. During the respective addressing periods, scan pulse voltage Va is applied to odd-number scan electrodes or even-number scan electrodes while priming pulse voltage Vp is applied, prior to the application of the scan pulse voltage, to a priming electrode adjacent to the scan electrode to which scan pulse voltage Va is to be applied, in order to generate a priming discharge between the priming electrodes and the data electrodes.
    Type: Application
    Filed: September 14, 2005
    Publication date: September 27, 2007
    Inventors: Hiroyuki Tachibana, Naoki Kosugi, Toshikazu Wakabayashi, Shigeyuki Okumura
  • Patent number: 7258639
    Abstract: A frictional forced power transmission belt transmits power to a pulley with its belt body wound around and in contact with the pulley. At least a contact part of the belt body with a pulley is formed of a rubber composition which contains ethylene-?-olefin elastomer as a rubber component but contains substantially no short fibers and which has a rubber hardness of not less than 80 but less than 95 when measured with a type A durometer in conformity with JIS K6253.
    Type: Grant
    Filed: March 31, 2004
    Date of Patent: August 21, 2007
    Assignee: Bando Chemical Industries, Ltd.
    Inventors: Hiroyuki Tachibana, Hiroyuki Shiriike
  • Patent number: 7244207
    Abstract: A frictional forced power transmission belt transmits power to a pulley with its belt body wound around and in contact with the pulley. At least a contact part of the belt body with a pulley is formed of a rubber composition in which powdery or granular polyolefin resin is contained in ethylene-?-olefin elastomer.
    Type: Grant
    Filed: March 31, 2004
    Date of Patent: July 17, 2007
    Assignee: Bando Chemical Industries, Ltd.
    Inventors: Hiroyuki Shiriike, Hiroyuki Tachibana
  • Publication number: 20070109223
    Abstract: During each set-up period, wall charges of scan electrodes and sustain electrodes, between which sustain discharges were generated in the previous subfield, are adjusted, and parts toward the sustain electrodes of positive charges in the scan electrodes are replaced by negative charges and parts toward the scan electrodes of negative charges in the sustain electrodes are replaced by positive charges. During each address period, write pulses are applied to the scan electrodes to generate write discharges utilizing priming discharges between the scan electrodes and priming electrodes. During each sustain period, positive charges are accumulated in the entire surfaces of the scan electrodes and negative charges are accumulated in the entire surfaces of the sustain electrodes.
    Type: Application
    Filed: June 23, 2004
    Publication date: May 17, 2007
    Inventors: Toshikazu Wakabayashi, Hiroyuki Tachibana, Naoki Kosugi, Ryuichi Murai, Kenji Ogawa, Yoshimasa Horie
  • Patent number: 7215303
    Abstract: Plasma display panel (PDP), PDP display apparatus, and method for driving the PDP. The PDP is a surface discharge AC PDP having a first substrate and a second substrate arranged to face each other with barrier ribs interposed therebetween. A first electrode and a second electrode are arranged on a facing surface of the first substrate so as to extend parallel to each other, and are covered with a dielectric layer. A third electrode is arranged on a facing surface of the second substrate so as to extend orthogonally to the first and second electrodes. A discharge gas is enclosed within a discharge space defined between the interposed barrier ribs. In the above PDP, the discharge gas is a gas mixture containing xenon. The xenon component comprises at least 5 vol % and less than 100 vol %, and has a partial pressure of at least 2 kPa. Furthermore, the gap between the first and second electrodes in the PDP is greater than a height of the discharge space.
    Type: Grant
    Filed: December 11, 2000
    Date of Patent: May 8, 2007
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Toru Ando, Hiroyuki Tachibana, Naoki Kosugi
  • Patent number: 7176852
    Abstract: A front substrate contains a plurality of scan electrodes and sustain electrodes. Two strips of scan electrodes and two strips of sustain electrodes are alternately disposed on the substrate. In addition, a plurality of auxiliary scan electrodes is disposed on the front substrate so as to be parallel to the scan electrodes. On the back substrate, a plurality of priming electrodes is disposed parallel to the scan electrodes. Each auxiliary scan electrode has electrical connections to the scan electrode that performs scanning earlier than the scan electrode adjacent to each auxiliary scan electrode. With the structure above, a priming discharge occurs between the auxiliary scan electrodes and the priming electrodes.
    Type: Grant
    Filed: March 23, 2004
    Date of Patent: February 13, 2007
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Hiroyuki Tachibana, Naoki Kosugi, Toshikazu Wakabayashi
  • Patent number: 7151343
    Abstract: A plasma display panel has address properties stabilized. A priming discharge is performed between auxiliary electrodes (18), which are formed on a front substrate (1) and coupled with scan electrodes (6), and priming electrodes (14) formed on a back substrate (2). And on the front substrate (1), a dielectric layer (4) is made thinner in regions corresponding to priming cells (gap parts 13) than in regions corresponding to cell parts (11). As a result, the priming discharge has a wider margin, and a supply of priming particles to the discharge cells is stabilized, whereby a discharge delay during the addressing is reduced, and the address properties are stabilized.
    Type: Grant
    Filed: March 25, 2004
    Date of Patent: December 19, 2006
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Hiroyuki Tachibana, Morio Fujitani, Yasuyuki Noguchi, Tetsuya Shirai
  • Publication number: 20060279214
    Abstract: Disclosed here is a plasma display panel having stable addressing characteristics and a method of manufacturing a plasma display panel having such a reliable structure. According to the plasma display panel and the manufacturing method, on back plate (2) that confronts front plate (1) having scan electrodes (6) and sustain electrodes (7) thereon, data electrodes (10), first dielectric layer (17) disposed to cover the data electrodes, priming electrodes (15), and second dielectric layer (18) disposed to cover the priming electrodes are formed in the order named; at the same time, the softening temperatures of the materials forming the components disposed on the back plate are determined so as to become lower in the order named. The temperature setting protects first dielectric layer (17) from deterioration or deformation, improving dielectric voltage between data electrodes (10) and priming electrodes (15).
    Type: Application
    Filed: May 18, 2004
    Publication date: December 14, 2006
    Inventors: Morio Fujitani, Keisuke Sumida, Tatsuo Mifune, Shinichiro Ishino, Hiroyuki Tachibana
  • Patent number: 7141929
    Abstract: A plasma display panel to stabilize address properties. A front substrate (1) and a back substrate (2) face each other, to form a discharge space (3) which is partitioned by barrier ribs (11) to form priming discharge cells (16) and main discharge cells (12). A dielectric layer (17) is formed on the back substrate (2) on which the priming discharge cell (16) is present. Insulation is ensured between a data electrode (10) and the priming electrode (15) because the latter is formed on the dielectric layer (17). One is able to generate a priming discharge before a main discharge.
    Type: Grant
    Filed: March 25, 2004
    Date of Patent: November 28, 2006
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Hiroyuki Tachibana, Naoki Kosugi, Tsuyoshi Nishio, Masaki Nishimura
  • Patent number: 7112922
    Abstract: A plasma display panel has address properties stabilized. A priming discharge is performed between auxiliary electrodes (17), which are formed on a front substrate (1) and coupled with scan electrodes (6) and priming electrodes (14) formed on a back substrate (2). Furthermore, a material layer (5) containing at least one of alkali metal oxide, alkaline earth metal oxide and fluoride is provided on regions corresponding to priming discharge spaces (30) (gap parts 13) on the back substrate (2). As a result, the priming discharge has a wider margin, and a supply of priming particles to the discharge cells is stabilized, whereby a discharge delay during the addressing is reduced, and the address properties are stabilized.
    Type: Grant
    Filed: March 25, 2004
    Date of Patent: September 26, 2006
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Hiroyuki Tachibana, Tomohiro Murakoso, Yasuyuki Noguchi, Tetsuya Shirai
  • Patent number: 7084569
    Abstract: A highly reliable plasma display panel is provided with less difference in wiring resistance, which can be driven at high speed even though the front or rear board has multilayer electrode wiring. A data electrode is covered with a dielectric layer, and a priming electrode is provided on the dielectric layer. An external wiring lead-out of the data electrode is provided on a rear substrate, and an external wiring lead-out of the priming electrode is provided on the dielectric layer. Wiring lead-out of the data electrode and wiring lead-out of the priming electrode have a step equivalent to the thickness of the dielectric layer.
    Type: Grant
    Filed: February 18, 2004
    Date of Patent: August 1, 2006
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Hiroyuki Tachibana, Naoki Kosugi, Masafumi Okawa, Ryuichi Murai
  • Publication number: 20060164338
    Abstract: Barrier ribs are disposed on a back substrate so as to separate main discharge cells and priming discharge cells, and the top parts of the barrier ribs are formed so as to abut on a front substrate. In a driving method, in an odd-numbered line writing time period, scan pulse Va is sequentially applied to odd-numbered scan electrode SCp and voltage Vq is applied to even-numbered sustain electrode SUp+1 to cause priming discharge between even-numbered sustain electrode SUp+1 and odd-numbered scan electrode SCp. In an even-numbered line writing time period, scan pulse Va is sequentially applied to even-numbered scan electrode SCp+1 and voltage Vq is applied to odd-numbered sustain electrode SUp to cause priming discharge between odd-numbered sustain electrode SUp and even-numbered scan electrode SCp+1.
    Type: Application
    Filed: February 23, 2005
    Publication date: July 27, 2006
    Inventors: Hiroyuki Tachibana, Jumpei Hashiguchi, Kenji Ogawa, Toshikazu Wakabayashi, Tomohiro Murakoso
  • Publication number: 20060145997
    Abstract: Barrier ribs are disposed on a back substrate so as to separate main discharge cells formed of a display electrode pair and a data electrode which face each other and priming discharge cells formed of a clearance between two adjacent scan electrodes. The top parts of the barrier ribs are formed so as to abut on a front substrate. In a driving method, in an odd-numbered line writing time period, scan pulse Va is sequentially applied to odd-numbered scan electrode SCp and voltage Vq is applied to even-numbered scan electrode SCp+1 to cause priming discharge between scan electrode SCp+1 and odd-numbered scan electrode SCp. In an even-numbered line writing time period, scan pulse Va is sequentially applied to even-numbered scan electrode SCp+1 and voltage Vq is applied to odd-numbered scan electrode SCp to cause priming discharge between scan electrode SCp and even-numbered scan electrode SCp+1.
    Type: Application
    Filed: January 13, 2005
    Publication date: July 6, 2006
    Inventors: Hiroyuki Tachibana, Jumpei Hashiguchi, Kenji Ogawa, Toshikazu Wakabayashi, Tomohiro Murakoso
  • Publication number: 20060113914
    Abstract: A plasma display panel has a stable addressing characteristic, no dielectric breakdown, and high reliability. Data electrodes (10), first dielectric layer (17) for covering them, priming electrodes (15), and second dielectric layer (18) for covering them are sequentially formed on back substrate (2). Slotted parts (10a) are formed in a part of each data electrode (10). Thus, data electrodes (10) are prevented from deforming during the manufacturing, and dielectric voltage between data electrodes (10) and priming electrodes (15) is improved.
    Type: Application
    Filed: June 1, 2004
    Publication date: June 1, 2006
    Inventors: Morio Fujitani, Keisuke Sumida, Tatsuo Mifune, Shinichiro Ishino, Hiroyuki Tachibana
  • Patent number: 7030562
    Abstract: The invention is a plasma display panel capable of stabilizing the addressing characteristics. A barrier rib is formed by longitudinal barrier ribs portion orthogonal to the scan electrodes and sustain electrodes on the front substrate, and side barrier rib portions crossing with these longitudinal barrier rib portions, to form cell spaces and form interstice portions between the cell spaces, and priming electrodes for producing a discharge between the front substrate and the rear substrate within the interstice portions are formed. Stable priming discharge is produced with certainty by the scan electrode and the priming electrode, hence decreasing the discharge time lag at the time of addressing and stabilizing the addressing characteristics.
    Type: Grant
    Filed: October 24, 2003
    Date of Patent: April 18, 2006
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Hiroyuki Tachibana, Naoki Kosugi, Tomohiro Murakoso, Nobuaki Nagao, Ryuichi Murai
  • Publication number: 20060050023
    Abstract: A method of driving a plasma display panel including priming electrodes (PR1 to PRn). In the writing period of a sub-field, prior to scanning of respective scan electrodes (SC1 to SCn), priming discharge is caused between the scan electrodes (SC1 to SCn) and the priming electrodes (PR1 to PRn). The time interval between the application of voltage to the priming electrodes (PR1 to PRn) for causing the priming discharge and the scanning of the corresponding scan electrodes (SC1 to SCn) is set within 10 ?s.
    Type: Application
    Filed: March 23, 2004
    Publication date: March 9, 2006
    Inventors: Hiroyuki Tachibana, Naoki Kosugi, Nobuaki Nagao, Ryuichi Murai
  • Patent number: 7009587
    Abstract: A gas discharge panel includes a first substrate and a second substrate. A plurality of display electrode pairs which are each made up of a sustain electrode and a scan electrode are formed on the first substrate, and the first substrate and the second substrate are set facing each other with a plurality of barrier ribs in between so as to form a plurality of cells. In this gas discharge panel, at least one of the sustain electrode and the scan electrode includes: a plurality of line parts; and a discharge developing part which makes a gap between adjacent line parts smaller in areas corresponding to channels between adjacent barrier ribs than in areas corresponding to the barrier ribs.
    Type: Grant
    Filed: August 16, 2001
    Date of Patent: March 7, 2006
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Masaki Nishimura, Hidetaka Higashino, Ryuichi Murai, Yuusuke Takada, Nobuaki Nagao, Toru Ando, Naoki Kosugi, Hiroyuki Tachibana