Abstract: A transistor whose channel is formed in a semiconductor having dielectric anisotropy is provided. A transistor having a small subthreshold swing value is provided. A transistor having normally-off electrical characteristics is provided. A transistor having a low leakage current in an off state is provided. A semiconductor device includes an insulator, a semiconductor, and a conductor. In the semiconductor device, the semiconductor includes a region overlapping with the conductor with the insulator positioned therebetween, and a dielectric constant of the region in a direction perpendicular to a top surface of the region is higher than a dielectric constant of the region in a direction parallel to the top surface.

Abstract: A transistor whose channel is formed in a semiconductor having dielectric anisotropy is provided. A transistor having a small subthreshold swing value is provided. A transistor having normally-off electrical characteristics is provided. A transistor having a low leakage current in an off state is provided. A semiconductor device includes an insulator, a semiconductor, and a conductor. In the semiconductor device, the semiconductor includes a region overlapping with the conductor with the insulator positioned therebetween, and a dielectric constant of the region in a direction perpendicular to a top surface of the region is higher than a dielectric constant of the region in a direction parallel to the top surface.

Abstract: A transistor whose channel is formed in a semiconductor having dielectric anisotropy is provided. A transistor having a small subthreshold swing value is provided. A transistor having normally-off electrical characteristics is provided. A transistor having a low leakage current in an off state is provided. A semiconductor device includes an insulator, a semiconductor, and a conductor. In the semiconductor device, the semiconductor includes a region overlapping with the conductor with the insulator positioned therebetween, and a dielectric constant of the region in a direction perpendicular to a top surface of the region is higher than a dielectric constant of the region in a direction parallel to the top surface.

Abstract: A transistor whose channel is formed in a semiconductor having dielectric anisotropy is provided. A transistor having a small subthreshold swing value is provided. A transistor having normally-off electrical characteristics is provided. A transistor having a low leakage current in an off state is provided. A semiconductor device includes an insulator, a semiconductor, and a conductor. In the semiconductor device, the semiconductor includes a region overlapping with the conductor with the insulator positioned therebetween, and a dielectric constant of the region in a direction perpendicular to a top surface of the region is higher than a dielectric constant of the region in a direction parallel to the top surface.

Abstract: A power storage device including a negative electrode having high cycle performance in which little deterioration due to charge and discharge occurs is manufactured. A power storage device including a positive electrode, a negative electrode, and an electrolyte provided between the positive electrode and the negative electrode is manufactured, in which the negative electrode includes a negative electrode current collector and a negative electrode active material layer, and the negative electrode active material layer includes an uneven silicon layer formed over the negative electrode current collector, a silicon oxide layer or a mixed layer which includes silicon oxide and a silicate compound and is in contact with the silicon layer, and graphene in contact with the silicon oxide layer or the mixed layer including the silicon oxide and the silicate compound.

Abstract: A power storage device including a negative electrode having high cycle performance in which little deterioration due to charge and discharge occurs is manufactured. A power storage device including a positive electrode, a negative electrode, and an electrolyte provided between the positive electrode and the negative electrode is manufactured, in which the negative electrode includes a negative electrode current collector and a negative electrode active material layer, and the negative electrode active material layer includes an uneven silicon layer formed over the negative electrode current collector, a silicon oxide layer or a mixed layer which includes silicon oxide and a silicate compound and is in contact with the silicon layer, and graphene in contact with the silicon oxide layer or the mixed layer including the silicon oxide and the silicate compound.