Patents by Inventor Hiroyuki Tsunakawa

Hiroyuki Tsunakawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9531401
    Abstract: The semiconductor integrated circuit device has: more than one analog port; an A/D conversion part operable to execute an A/D conversion process for converting an analog signal taken in through each analog port into a digital signal for each preset virtual channel; and an A/D conversion control part operable to control an action of the A/D conversion part. The A/D conversion control part includes: virtual channel registers on which correspondence between the virtual channel and the analog port can be set; and a scan-group-forming register on which a start position of a scan group and an end position thereof can be set. The A/D conversion control part controls the A/D conversion part to successively execute an A/D conversion process on a plurality of virtual channels from a virtual channel associated with the start pointer to a virtual channel associated with the end pointer.
    Type: Grant
    Filed: January 16, 2016
    Date of Patent: December 27, 2016
    Assignee: Renesas Electronics Corporation
    Inventors: Fumiki Kawakami, Naoki Yada, Hiroyuki Tsunakawa
  • Publication number: 20160134296
    Abstract: The semiconductor integrated circuit device has: more than one analog port; an A/D conversion part operable to execute an A/D conversion process for converting an analog signal taken in through each analog port into a digital signal for each preset virtual channel; and an A/D conversion control part operable to control an action of the A/D conversion part. The A/D conversion control part includes: virtual channel registers on which correspondence between the virtual channel and the analog port can be set; and a scan-group-forming register on which a start position of a scan group and an end position thereof can be set. The A/D conversion control part controls the A/D conversion part to successively execute an A/D conversion process on a plurality of virtual channels from a virtual channel associated with the start pointer to a virtual channel associated with the end pointer.
    Type: Application
    Filed: January 16, 2016
    Publication date: May 12, 2016
    Inventors: Fumiki Kawakami, Naoki Yada, Hiroyuki Tsunakawa
  • Patent number: 9246506
    Abstract: The semiconductor integrated circuit device has: more than one analog port; an A/D conversion part operable to execute an A/D conversion process for converting an analog signal taken in through each analog port into a digital signal for each preset virtual channel; and an A/D conversion control part operable to control an action of the A/D conversion part. The A/D conversion control part includes: virtual channel registers on which correspondence between the virtual channel and the analog port can be set; and a scan-group-forming register on which a start position of a scan group and an end position thereof can be set. The A/D conversion control part controls the A/D conversion part to successively execute an A/D conversion process on a plurality of virtual channels from a virtual channel associated with the start pointer to a virtual channel associated with the end pointer.
    Type: Grant
    Filed: February 20, 2015
    Date of Patent: January 26, 2016
    Assignee: Renesas Electronics Corporation
    Inventors: Fumiki Kawakami, Naoki Yada, Hiroyuki Tsunakawa
  • Publication number: 20150162927
    Abstract: The semiconductor integrated circuit device has: more than one analog port; an A/D conversion part operable to execute an A/D conversion process for converting an analog signal taken in through each analog port into a digital signal for each preset virtual channel; and an A/D conversion control part operable to control an action of the A/D conversion part. The A/D conversion control part includes: virtual channel registers on which correspondence between the virtual channel and the analog port can be set; and a scan-group-forming register on which a start position of a scan group and an end position thereof can be set. The A/D conversion control part controls the A/D conversion part to successively execute an A/D conversion process on a plurality of virtual channels from a virtual channel associated with the start pointer to a virtual channel associated with the end pointer.
    Type: Application
    Filed: February 20, 2015
    Publication date: June 11, 2015
    Inventors: Fumiki KAWAKAMI, Naoki YADA, Hiroyuki TSUNAKAWA
  • Patent number: 8970410
    Abstract: The semiconductor integrated circuit device has: more than one analog port; an A/D conversion part operable to execute an A/D conversion process for converting an analog signal taken in through each analog port into a digital signal for each preset virtual channel; and an A/D conversion control part operable to control an action of the A/D conversion part. The A/D conversion control part includes: virtual channel registers on which correspondence between the virtual channel and the analog port can be set; and a scan-group-forming register on which a start position of a scan group and an end position thereof can be set. The A/D conversion control part controls the A/D conversion part to successively execute an A/D conversion process on a plurality of virtual channels from a virtual channel associated with the start pointer to a virtual channel associated with the end pointer.
    Type: Grant
    Filed: February 7, 2013
    Date of Patent: March 3, 2015
    Assignee: Renesas Electronics Corporation
    Inventors: Fumiki Kawakami, Naoki Yada, Hiroyuki Tsunakawa
  • Patent number: 7391354
    Abstract: One input terminals of switches respectively coupled to capacitors of a capacitance array type D/A converter configured as a main DAC are coupled to a first external terminal of an IC. On the other hand, a current switching type D/A converter of a resistance string type D/A converter configured as a sub DAC that causes a DC current to flow therethrough is coupled to a second external terminal of the IC.
    Type: Grant
    Filed: January 25, 2007
    Date of Patent: June 24, 2008
    Assignee: Renesas Technology Corp.
    Inventors: Hiroyuki Tsunakawa, Akihiro Kitagawa
  • Publication number: 20070216558
    Abstract: One input terminals of switches respectively coupled to capacitors of a capacitance array type D/A converter configured as a main DAC are coupled to a first external terminal of an IC. On the other hand, a current switching type D/A converter of a resistance string type D/A converter configured as a sub DAC that causes a DC current to flow therethrough is coupled to a second external terminal of the IC.
    Type: Application
    Filed: January 25, 2007
    Publication date: September 20, 2007
    Inventors: Hiroyuki Tsunakawa, Akihiro Kitagawa