Patents by Inventor Hiroyuki Ueda
Hiroyuki Ueda has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20190109224Abstract: A nitride semiconductor apparatus includes a nitride semiconductor layer, a gate insulating film, a source electrode, a drain electrode, and a gate electrode. The nitride semiconductor layer includes a first body layer, a second body layer, a drift layer, a first source layer, and a second source layer. The drift layer includes a first drift layer that extends from a position in contact with a bottom surface of the first body layer to a position in contact with a bottom surface of the second body layer, and an electric field relaxation layer that is in contact with a lower end portion of a side surface of the first body layer and a lower end portion of a side surface of the second body layer, is in contact with the first drift layer, and has a second conduction type impurity concentration lower than that of the first drift layer.Type: ApplicationFiled: September 27, 2018Publication date: April 11, 2019Applicant: TOYOTA JIDOSHA KABUSHIKI KAISHAInventors: Hidemoto Tomita, Hiroyuki Ueda, Tomohiko Mori
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Patent number: 10256295Abstract: A semiconductor device includes an outside-of-well n-type region, a p-type well region surrounded by the outside-of-well n-type region, an inside-of-well n-type region, and a gate electrode. The outside-of-well n-type region includes an impurity low-concentration region that is in contact with the p-type well region, and an impurity high-concentration region that is separated from the p-type well region by the impurity low-concentration region.Type: GrantFiled: September 14, 2017Date of Patent: April 9, 2019Assignee: TOYOTA JIDOSHA KABUSHIKI KAISHAInventors: Masahiro Kawakami, Tomohiko Mori, Hiroyuki Ueda
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Patent number: 10242869Abstract: A method of manufacturing a switching element includes forming a recessed portion in a surface of a GaN semiconductor substrate in which a first n-type semiconductor layer is exposed on the surface, growing a p-type body layer within the recessed portion and on the surface of the GaN semiconductor substrate, removing a surface layer portion of the body layer to expose the first n-type semiconductor layer on the surface of the GaN semiconductor substrate, and leave the body layer within the recessed portion, forming a second n-type semiconductor layer which is separated from the first n-type semiconductor layer by the body layer and is exposed on the surface of the GaN semiconductor substrate, and forming a gate electrode which faces the body layer through an insulating film.Type: GrantFiled: December 14, 2017Date of Patent: March 26, 2019Assignee: TOYOTA JIDOSHA KABUSHIKI KAISHAInventors: Tetsuya Yamada, Hiroyuki Ueda, Tomohiko Mori
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Publication number: 20190077168Abstract: A de-curling device de-curls a sheet and includes an endless belt, a de-curling roller, a nip width adjusting mechanism, and a belt tension adjusting mechanism. The endless belt is looped around a pair of supporting rollers. The de-curling roller is provided between the pair of supporting rollers and has a first outer circumferential surface pressed against a second outer circumferential surface of the endless belt to form a nip portion at which the endless belt curves along the first outer circumferential surface, the de-curling roller being configured to de-curl the sheet passing through the nip portion. The nip width adjusting mechanism adjusts the nip width by moving the de-curling roller in a direction intersecting the second outer circumferential surface of the endless belt. The belt tension adjusting mechanism adjusts the tension of the endless belt according to the nip width adjusted by the nip width adjusting mechanism.Type: ApplicationFiled: September 10, 2018Publication date: March 14, 2019Inventors: Takatoshi Nishimura, Hiroatsu Tamai, Hiroyuki Ueda, Takeshi Watanabe, Susumu Hiroshima, Noriaki Ozawa, Toyotsune Inoue
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Publication number: 20190061381Abstract: A decurling device includes a belt, a roller, and a heat source. The heat source heats either or both of the belt and the roller. The belt has a first holding surface extending in a rotational direction of the belt. The roller has a second holding surface extending in a rotational direction of the roller. The decurling device has either or both of a plurality of belt through holes penetrating the first holding surface and a plurality of through holes penetrating the second holding surface.Type: ApplicationFiled: August 27, 2018Publication date: February 28, 2019Applicant: KYOCERA Document Solutions Inc.Inventors: Hiroatsu TAMAI, Takeshi WATANABE, Hiroyuki UEDA, Noriaki OZAWA, Toyotsune INOUE, Susumu HIROSHIMA, Takatoshi NISHIMURA
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Publication number: 20190004468Abstract: An inkjet recording apparatus includes an image forming section, a heater, a calculation section, storage, and a determination section. The image forming section ejects ink onto a sheet in which first to M-th regions are defined (M is an integer of at least 2). The heater includes first to M-th heat sources and heats an n-th region of the sheet using an n-th heat source (n is an integer of at least 1 and no greater than M). The calculation section calculates an ink ejection rate of ink to be ejected onto the n-th region. The storage stores therein heating information indicating whether it is necessary to heat the n-th region. The determination section determines whether or not to cause the n-th heat source to generate heat.Type: ApplicationFiled: June 26, 2018Publication date: January 3, 2019Applicant: KYOCERA Document Solutions Inc.Inventors: Takeshi WATANABE, Hiroyuki UEDA, Hiroatsu TAMAI, Takatoshi NISHIMURA, Noriaki OZAWA, Toyotsune INOUE, Susumu HIROSHIMA
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Publication number: 20180339527Abstract: A decurling device includes a first conveyance path, a second conveyance path, a first switch, a decurler, and a controller. A sheet is conveyed along the first conveyance path or the second conveyance path. The first switch switches a route of conveyance of the sheet to the first conveyance path or the second conveyance path. The sheet has a first main surface and a second main surface. The decurler is located in the second conveyance path. The decurler corrects curl of the sheet. In a situation in which a weight per unit area of the sheet is smaller than a first threshold value, the controller controls the first switch such that the sheet is conveyed along the second conveyance path.Type: ApplicationFiled: May 10, 2018Publication date: November 29, 2018Applicant: KYOCERA Document Solutions Inc.Inventors: Hiroatsu TAMAI, Takeshi WATANABE, Hiroyuki UEDA, Noriaki OZAWA, Toyotsune INOUE, Susumu HIROSHIMA, Takatoshi NISHIMURA
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Publication number: 20180339528Abstract: A decurling device includes a decurler. The decurler includes a first dryer roller, a second dryer roller, and a heat source. The heat source is disposed at the first dryer roller to heat the first dryer roller. The first dryer roller and the second dryer roller rotate while holding a sheet therebetween to convey the sheet.Type: ApplicationFiled: May 23, 2018Publication date: November 29, 2018Applicant: KYOCERA Document Solutions Inc.Inventors: Hiroyuki UEDA, Susumu HIROSHIMA, Takeshi WATANABE, Takatoshi NISHIMURA, Hiroatsu TAMAI, Noriaki OZAWA, Toyotsune INOUE
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Publication number: 20180276021Abstract: An information processing system includes one or more virtual machines, a container scaling apparatus, a virtual-machine scaling apparatus, a calculating unit, and a reflecting unit. The container scaling apparatus performs autoscaling of a container that runs on the one or more virtual machines. The virtual-machine scaling apparatus performs autoscaling of the virtual machines in accordance with a difference in a necessary number of virtual machines and a number of virtual machines that are currently running. The calculating unit calculates, from a necessary number of containers calculated by the container scaling apparatus, a number of virtual machines that is necessary to cause the necessary number of containers to run thereon. The reflecting unit reflects the number calculated by the calculating unit to the necessary number of virtual machines to be used by the virtual-machine scaling apparatus.Type: ApplicationFiled: August 28, 2017Publication date: September 27, 2018Applicant: FUJI XEROX CO., LTD.Inventor: Hiroyuki UEDA
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Publication number: 20180233591Abstract: A semiconductor device includes a semiconductor substrate, a source electrode, a drain electrode, and a gate electrode disposed on the semiconductor substrate via a gate insulator film. The semiconductor substrate includes a first portion constituted of GaN and a second portion constituted of AlxGa(1-x)N (0<x?1). The first portion includes an n-type source region being in contact with the source electrode, an n-type drain region being in contact with the drain electrode, a p-type body region intervening between the source region and the drain region and being in contact with the source electrode, and an n-type drift region intervening between the body region and the drain region and having a carrier density that is lower than a carrier density of the drain region. The second portion includes a barrier region being in contact with each of the source electrode, the body region and the drift region.Type: ApplicationFiled: December 27, 2017Publication date: August 16, 2018Applicant: TOYOTA JIDOSHA KABUSHIKI KAISHAInventors: Atsushi WATANABE, Hiroyuki UEDA, Tomohiko MORI
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Patent number: 10036353Abstract: An exhaust gas recirculation apparatus includes: a fresh air throttle portion that continues from a fresh air inlet portion and is configured to throttle the flow of fresh air; an inner side tube portion that continues from the fresh air throttle portion, has a tubular shape and has an opening end disposed on a side opposite to the fresh air throttle portion; an exhaust gas inlet portion configured to receive a flow of exhaust gas; a surrounding portion that continues from the exhaust gas inlet portion, surrounds the inner side tube portion, and defines a circumference direction flow path for the exhaust gas extending along an outer circumference surface of the inner side tube portion; and an outlet portion that continues from the surrounding portion, has a tubular shape, and defines a merging flow path configured to receive the flow of the fresh air flowing out from the opening end of the inner side tube portion and the flow of the exhaust gas flowing out from the circumference direction flow path.Type: GrantFiled: December 22, 2014Date of Patent: July 31, 2018Assignee: Mitsubishi Heavy Industries, Ltd.Inventors: Shintaro Shuto, Tatsuo Ishiguro, Hiromi Komatsu, Yasuhiro Tanaka, Takafumi Tanaka, Satoshi Yamada, Hiroyuki Ueda
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Publication number: 20180182883Abstract: A switching element includes a semiconductor substrate that includes a first n-type semiconductor layer, a p-type body layer constituted by an epitaxial layer, and a second n-type semiconductor layer separated from the first n-type semiconductor layer by the body layer, a gate insulating film that covers a range across the surface of the first n-type semiconductor layer, the surface of the body layer, and the surface of the second n-type semiconductor layer, and a gate electrode that faces the body layer through the gate insulating film. An interface between the first n-type semiconductor layer and the body layer includes an inclined surface. The inclined surface is inclined such that the depth of the body layer increases as a distance from an end of the body layer increases in a horizontal direction. The inclined surface is disposed below the gate electrode.Type: ApplicationFiled: December 6, 2017Publication date: June 28, 2018Applicant: TOYOTA JIDOSHA KABUSHIKI KAISHAInventors: Tetsuya YAMADA, Takashi OKAWA, Tomohiko MORI, Hiroyuki UEDA
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Publication number: 20180182621Abstract: A method of manufacturing a switching element includes forming a recessed portion in a surface of a GaN semiconductor substrate in which a first n-type semiconductor layer is exposed on the surface, growing a p-type body layer within the recessed portion and on the surface of the GaN semiconductor substrate, removing a surface layer portion of the body layer to expose the first n-type semiconductor layer on the surface of the GaN semiconductor substrate, and leave the body layer within the recessed portion, forming a second n-type semiconductor layer which is separated from the first n-type semiconductor layer by the body layer and is exposed on the surface of the GaN semiconductor substrate, and forming a gate electrode which faces the body layer through an insulating film.Type: ApplicationFiled: December 14, 2017Publication date: June 28, 2018Applicant: TOYOTA JIDOSHA KABUSHIKI KAISHAInventors: Tetsuya YAMADA, Hiroyuki UEDA, Tomohiko MORI
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Patent number: 10002863Abstract: A semiconductor device is capable of accurately sensing a temperature of a semiconductor element incorporated in a semiconductor substrate. The semiconductor device includes a temperature sensor. The temperature sensor includes a first nitride semiconductor layer of p-type, a first sense electrode, and a second sense electrode. The first sense electrode and the second sense electrode are located to be capable of passing an electric current between the first sense electrode and the second sense electrode through the first nitride semiconductor layer.Type: GrantFiled: May 3, 2016Date of Patent: June 19, 2018Assignee: TOYOTA JIDOSHA KABUSHIKI KAISHAInventors: Hidemoto Tomita, Yoshitaka Nagasato, Takashi Okawa, Masakazu Kanechika, Hiroyuki Ueda
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Publication number: 20180102405Abstract: A semiconductor device includes an outside-of-well n-type region, a p-type well region surrounded by the outside-of-well n-type region, an inside-of-well n-type region, and a gate electrode. The outside-of-well n-type region includes an impurity low-concentration region that is in contact with the p-type well region, and an impurity high-concentration region that is separated from the p-type well region by the impurity low-concentration region.Type: ApplicationFiled: September 14, 2017Publication date: April 12, 2018Applicant: TOYOTA JIDOSHA KABUSHIKI KAISHAInventors: Masahiro KAWAKAMI, Tomohiko MORI, Hiroyuki UEDA
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Publication number: 20180090600Abstract: A semiconductor device may include a nitride semiconductor layer, an insulation gate section, and a heterojunction region, wherein the nitride semiconductor layer may include an n-type vertical drift region, a p-type channel region adjoining the vertical drift region, and an n-type source region separated from the vertical drift region by the channel region, wherein the insulation gate section is opposed to a portion of the channel region that separates the vertical drift region and the source region, the heterojunction region is in contact with at least a part of a portion of the vertical drift region that is disposed at the one of main surfaces, and the heterojunction region is an n-type nitride semiconductor or an i-type nitride semiconductor having a bandgap wider than a bandgap of the vertical drift region.Type: ApplicationFiled: August 8, 2017Publication date: March 29, 2018Applicant: TOYOTA JIDOSHA KABUSHIKI KAISHAInventors: Hidemoto TOMITA, Masakazu KANECHIKA, Hiroyuki UEDA, Tomohiko MORI
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Patent number: 9773900Abstract: A semiconductor device includes: an electron transit layer constituted of GaN; an electron supply layer constituted of Inx1Aly1Ga1?x1?y1N (0?x1<1, 0?y1<1, 0<1?x1?y1<1) and provided on the electron transit layer; a source electrode and a drain electrode that are provided on the electron supply layer and located apart from each other; a threshold voltage adjustment layer constituted of Inx2Aly2Ga1?x2?y2N (0?x2<1, 0?y2<1, 0<1?x2?y2?1) of a p-type and provided on a part of the electron supply layer located between the source electrode and the drain electrode; and a gate electrode provided on the threshold voltage adjustment layer. A high resistance layer is respectively interposed both between the gate electrode and the threshold voltage adjustment layer, and between the threshold voltage adjustment layer and the electron supply layer.Type: GrantFiled: August 18, 2016Date of Patent: September 26, 2017Assignee: TOYOTA JIDOSHA KABUSHIKI KAISHAInventors: Hidemoto Tomita, Masakazu Kanechika, Hiroyuki Ueda
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Patent number: 9735260Abstract: A semiconductor device has a stacked structure in which a p-GaN layer, an SI-GaN layer, and an AlGaN layer are stacked, and has a gate electrode that is formed at a top surface side of the AlGaN layer. A band gap of the AlGaN layer is wider than a band gap of the p-GaN layer and the SI-GaN layer. Moreover, impurity concentration of the SI-GaN layer is less than 1×1017 cm?3. Semiconductor devices including III-V semiconductors may have a stable normally-off operation.Type: GrantFiled: February 27, 2014Date of Patent: August 15, 2017Assignee: Toyota Jidosha Kabushiki KaishaInventors: Masahiro Sugimoto, Tetsu Kachi, Yoshitaka Nakano, Tsutomu Uesugi, Hiroyuki Ueda, Narumasa Soejima
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Publication number: 20170098701Abstract: A semiconductor device includes: an electron transit layer constituted of GaN; an electron supply layer constituted of Inx1Aly1Ga1-x1-y1N (0?x1<1, 0?y1<1, 0<1?x1?y1<1) and provided on the electron transit layer; a source electrode and a drain electrode that are provided on the electron supply layer and located apart from each other; a threshold voltage adjustment layer constituted of Inx2Aly2Ga1-x2-y2N (0?x2<1, 0?y2<1, 0<1?x2?y2?1) of a p-type and provided on a part of the electron supply layer located between the source electrode and the drain electrode; and a gate electrode provided on the threshold voltage adjustment layer. A high resistance layer is respectively interposed both between the gate electrode and the threshold voltage adjustment layer, and between the threshold voltage adjustment layer and the electron supply layer.Type: ApplicationFiled: August 18, 2016Publication date: April 6, 2017Applicant: TOYOTA JIDOSHA KABUSHIKI KAISHAInventors: Hidemoto TOMITA, Masakazu KANECHIKA, Hiroyuki UEDA
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Patent number: 9541483Abstract: A contact state observation apparatus of golf ball can observe the contact phenomenon between a golf ball and a golf club which has been conventionally hidden and unobservable. The contact state observation apparatus of golf ball includes: launching means for launching a golf ball 10; an impact plate 20 with which the launched golf ball 10 impacts; and imaging means 30, provided opposite to the launching means across the impact plate 20, for shooting an image of the contact state between the golf ball 10 and the impact plate 20 at the time of impact of the golf ball 10. The impact plate 20 has, in a part where the golf ball 10 impacts, an observation hole 21 whose area is smaller than a contact area with the golf ball, and the imaging means 30 shoots the image of the contact state through the observation hole 21.Type: GrantFiled: April 2, 2015Date of Patent: January 10, 2017Assignees: BRIDGESTONE CORPORATION, BRIDGESTONE SPORTS CO., LTDInventors: Hiroyuki Ueda, Kazuo Uchida, Atsushi Komatsu, Wataru Ban