Patents by Inventor Hiroyuki W. Takahashi

Hiroyuki W. Takahashi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20040032772
    Abstract: In accordance with the present invention, in order to reduce an averaged consumption current in a stand-by state, there is provided a semiconductor memory device including a memory cell array area which is divided into a plurality of areas, wherein the semiconductor memory device includes: at least one specific area setting unit being electrically coupled to said memory cell array area and adopted to set at least one area defined in said plurality of areas in accordance with an optional criterion; and at least one refresh operation control unit being electrically coupled to said memory cell array area and adopted to perform a refresh operation to the specific area based on at least one kind of specific refresh control signal, which is longer in cycle than a basic refresh control signal at least in a predetermined state of the semiconductor memory device.
    Type: Application
    Filed: April 30, 2003
    Publication date: February 19, 2004
    Inventor: Hiroyuki W. Takahashi