Patents by Inventor Hiroyuki Yoshinaga

Hiroyuki Yoshinaga has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20170353009
    Abstract: A quantum cascade laser integrated device includes: first and second lower semiconductor mesas extending in a direction of a first axis; a covering region disposed on top and side faces of the first and second lower semiconductor mesas, and including a first and second upper semiconductor mesas, the first and second upper semiconductor mesas extending in the direction of the first axis on the first and second lower semiconductor mesas, respectively; and a first and second electrodes disposed on the second upper semiconductor mesa, the first lower semiconductor mesa and the second lower semiconductor mesa each including a quantum cascading core layer, the covering region including a current blocking semiconductor region embedding the first and second lower semiconductor mesas, and a first conductivity-type semiconductor region disposed on the first and second lower semiconductor mesas and the current blocking semiconductor region, and the conductivity-type semiconductor region including an upper cladding regio
    Type: Application
    Filed: May 30, 2017
    Publication date: December 7, 2017
    Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventor: HIROYUKI YOSHINAGA
  • Patent number: 9711944
    Abstract: A quantum cascade laser includes a substrate having a principal surface; a laser body region disposed on the principal surface, the laser body region including a semiconductor laminate structure having an end facet, the laser body region having a waveguide structure extending along a waveguide axis; and a distributed Bragg reflection region disposed on the principal surface, the distributed Bragg reflection region including low and high refractive index portions that are alternately arranged in a direction of the waveguide axis. The end facet of the semiconductor laminate structure is optically coupled to the distributed Bragg reflection region. Each of the high refractive index portions includes a semiconductor wall including upper and lower portions that are arranged in a direction intersecting with the principal surface of the substrate. The principal surface is disposed between the upper and lower portions. The lower portion includes a part of the substrate.
    Type: Grant
    Filed: July 8, 2016
    Date of Patent: July 18, 2017
    Assignee: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Jun-ichi Hashimoto, Manabu Shiozaki, Hiroyuki Yoshinaga
  • Publication number: 20170141542
    Abstract: A quantum cascade laser includes a laser structure including laser waveguide structures and a first terrace region; first electrodes; pad electrodes; and wiring metal conductors. The laser structure includes first, second and third regions arranged in a direction of a first axis. The third region is disposed between the first and second regions. The first region has a first end facet disposed at a boundary between the first and third regions. The first end facet extends in a direction intersecting with the first axis. The second region has a second end facet disposed at a boundary between the second and third regions. The second region includes the laser structure. The pad electrodes are disposed on the first terrace region. The first electrodes are disposed on the laser waveguide structures. Each of the pad electrodes is connected to one of the first electrodes through one of the wiring metal conductors.
    Type: Application
    Filed: November 15, 2016
    Publication date: May 18, 2017
    Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Hiroyuki YOSHINAGA, Tsukuru Katsuyama, Jun-ichi Hashimoto
  • Publication number: 20170040769
    Abstract: A quantum cascade laser includes a substrate having first and second substrate regions arranged along a first axis; a laser structure body including a laser body region having laser waveguide structures extending along the first axis, the laser structure body including first and second regions respectively including the first and second substrate regions, the laser body region having an end facet located at a boundary between the first and second regions, the second region including a terrace extending along the first axis from a bottom edge of the end facet; a plurality of first electrodes disposed on the laser waveguide structures; a plurality of pad electrodes disposed on the terrace; and a plurality of wiring metal bodies each of which includes a first portion on the terrace and a second portion on the end facet. The pad electrodes are connected with the first electrodes through the wiring metal bodies, respectively.
    Type: Application
    Filed: July 28, 2016
    Publication date: February 9, 2017
    Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Jun-ichi HASHIMOTO, Tsukuru KATSUYAMA, Hiroyuki YOSHINAGA
  • Publication number: 20170012408
    Abstract: A quantum cascade laser includes a substrate having a principal surface; a laser body region disposed on the principal surface, the laser body region including a semiconductor laminate structure having an end facet, the laser body region having a waveguide structure extending along a waveguide axis; and a distributed Bragg reflection region disposed on the principal surface, the distributed Bragg reflection region including low and high refractive index portions that are alternately arranged in a direction of the waveguide axis. The end facet of the semiconductor laminate structure is optically coupled to the distributed Bragg reflection region. Each of the high refractive index portions includes a semiconductor wall including upper and lower portions that are arranged in a direction intersecting with the principal surface of the substrate. The principal surface is disposed between the upper and lower portions. The lower portion includes a part of the substrate.
    Type: Application
    Filed: July 8, 2016
    Publication date: January 12, 2017
    Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Jun-ichi HASHIMOTO, Manabu SHIOZAKI, Hiroyuki YOSHINAGA
  • Patent number: 9350140
    Abstract: A quantum cascade laser includes a substrate having first and second regions; a stacked semiconductor layer disposed on the second region, the stacked semiconductor layer including an active layer, the stacked semiconductor layer having a first end facet and a second end facet that constitute a laser cavity; an insulating layer disposed on the first end facet and an upper surface of the stacked semiconductor layer, the insulating layer having an opening on the upper surface; a conductive layer disposed on the insulating layer and in the opening, the conductive layer being in contact with the upper surface through the opening; and a metal layer disposed on the conductive layer on the first end facet and the upper surface. The first end facet of the stacked semiconductor layer is retreated from an end facet of the substrate to a boundary between the first and second regions.
    Type: Grant
    Filed: May 1, 2015
    Date of Patent: May 24, 2016
    Assignee: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Hiroyuki Yoshinaga, Junichi Hashimoto
  • Publication number: 20150318668
    Abstract: A quantum cascade laser includes a substrate having first and second regions; a stacked semiconductor layer disposed on the second region, the stacked semiconductor layer including an active layer, the stacked semiconductor layer having a first end facet and a second end facet that constitute a laser cavity; an insulating layer disposed on the first end facet and an upper surface of the stacked semiconductor layer, the insulating layer having an opening on the upper surface; a conductive layer disposed on the insulating layer and in the opening, the conductive layer being in contact with the upper surface through the opening; and a metal layer disposed on the conductive layer on the first end facet and an upper surface. The first end facet of the stacked semiconductor layer is retreated from an end facet of the substrate to a boundary between the first and second regions.
    Type: Application
    Filed: May 1, 2015
    Publication date: November 5, 2015
    Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Hiroyuki YOSHINAGA, Junichi HASHIMOTO
  • Publication number: 20140348196
    Abstract: A semiconductor optical device assembly includes a quantum cascade laser including first to fifth portions; and a sub-mount having a mount surface including first to third areas, the first area and the third area supporting the first portion and the fifth portion of the quantum cascade laser. The quantum cascade laser includes a substrate having a main surface; a semiconductor mesa disposed on the main surface in the third portion, the semiconductor mesa including a light emitting layer; and an electrode disposed on a surface in the first to fifth portions of quantum cascade laser, the electrode being in contact with an upper surface of the semiconductor mesa. The quantum cascade laser is mounted on the sub-mount with a gap formed between a surface of the electrode of the third portion of the quantum cascade laser and the second area of the sub-mount.
    Type: Application
    Filed: May 21, 2014
    Publication date: November 27, 2014
    Inventors: Hiroyuki Yoshinaga, Michio Murata
  • Patent number: 8617969
    Abstract: A method for producing a semiconductor optical device includes the steps of growing a semiconductor stacked layer including an etch stop layer and a plurality of semiconductor layers on a major surface of a substrate; forming a mask layer on a top surface of the semiconductor stacked layer so that a tip portion of each of protrusions that protrude from the top surface among protrusions generated in the step of growing the semiconductor stacked layer is exposed; etching the protrusion by wet etching using the mask layer; after etching the protrusion by wet etching, removing the protrusion by dry etching; and removing the mask layer from the top surface, after removing the protrusion by dry etching.
    Type: Grant
    Filed: June 22, 2012
    Date of Patent: December 31, 2013
    Assignee: Sumitomo Electric Industries Ltd.
    Inventors: Kenji Sakurai, Hideki Yagi, Hiroyuki Yoshinaga
  • Patent number: 8450128
    Abstract: A method for producing a semiconductor optical device includes the steps of forming a semiconductor region including a ridge structure on a substrate; forming an insulating film on the semiconductor region; forming a non-photosensitive resin region on the insulating film, forming a first mask that defines a scribe area; forming the scribe area by etching using the first mask; after removing the first mask, forming an insulating layer by etching the insulating film, forming an electrode on the ridge structure and the non-photosensitive resin region to produce a substrate product; forming a scribe line on a surface of the semiconductor region in the scribe area of the substrate product; and cutting the product along the scribe line to form a semiconductor laser bar.
    Type: Grant
    Filed: October 7, 2011
    Date of Patent: May 28, 2013
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Hideki Yagi, Hiroyuki Yoshinaga
  • Publication number: 20130012001
    Abstract: A method for producing a semiconductor optical device includes the steps of growing a semiconductor stacked layer including an etch stop layer and a plurality of semiconductor layers on a major surface of a substrate; forming a mask layer on a top surface of the semiconductor stacked layer so that a tip portion of each of protrusions that protrude from the top surface among protrusions generated in the step of growing the semiconductor stacked layer is exposed; etching the protrusion by wet etching using the mask layer; after etching the protrusion by wet etching, removing the protrusion by dry etching; and removing the mask layer from the top surface, after removing the protrusion by dry etching.
    Type: Application
    Filed: June 22, 2012
    Publication date: January 10, 2013
    Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Kenji SAKURAI, Hideki YAGI, Hiroyuki YOSHINAGA
  • Publication number: 20120094415
    Abstract: A method for producing a semiconductor optical device includes the steps of forming a semiconductor region including a ridge structure on a substrate; forming an insulating film on the semiconductor region; forming a non-photosensitive resin region on the insulating film, forming a first mask that defines a scribe area; forming the scribe area by etching using the first mask; after removing the first mask, forming an insulating layer by etching the insulating film, forming an electrode on the ridge structure and the non-photosensitive resin region to produce a substrate product; forming a scribe line on a surface of the semiconductor region in the scribe area of the substrate product; and cutting the product along the scribe line to form a semiconductor laser bar.
    Type: Application
    Filed: October 7, 2011
    Publication date: April 19, 2012
    Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Hideki YAGI, Hiroyuki Yoshinaga
  • Patent number: 8124543
    Abstract: A method for manufacturing an LD is disclosed. The LD has a striped structure including an optical active region. The striped structure is buried with resin, typically benzo-cyclo-butene (BCB). The method to form an opening in the BCB layer has tri-steps etching of the RIE. First step etches the BCB layer partially by a mixed gas of CF4 and O2, where CF4 has a first partial pressure, second step etches the photo-resist patterned on the top of the BCB layer by a mixed gas of CF4 and O2, where CF4 in this step has the second partial pressure less than the first partial pressure, and third step etches the BCB left in the first step by mixed gas of CF4 and O2, where CF4 in this step has the third partial pressure greater than the second partial pressure.
    Type: Grant
    Filed: May 24, 2010
    Date of Patent: February 28, 2012
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Hideki Yagi, Kenji Koyama, Hiroyuki Yoshinaga, Kuniaki Ishihara
  • Publication number: 20100303115
    Abstract: A method for manufacturing an LD is disclosed. The LD has a striped structure including an optical active region. The striped structure is buried with resin, typically benzo-cyclo-butene (BCB). The method to form an opening in the BCB layer has tri-steps etching of the RIE. First step etches the BCB layer partially by a mixed gas of CF4 and O2, where CF4 has a first partial pressure, second step etches the photo-resist patterned on the top of the BCB layer by a mixed gas of CF4 and O2, where CF4 in this step has the second partial pressure less than the first partial pressure, and third step etches the BCB left in the first step by mixed gas of CF4 and O2, where CF4 in this step has the third partial pressure greater than the second partial pressure.
    Type: Application
    Filed: May 24, 2010
    Publication date: December 2, 2010
    Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Hideki Yagi, Kenji Koyama, Hiroyuki Yoshinaga, Kuniaki Ishihara
  • Patent number: 7570467
    Abstract: An electrostatic protection circuit being an integrated circuit on a semiconductor substrate and including a first power supply terminal having a predetermined potential VDD, a second power supply terminal having a lower potential VSS than the predetermined potential, and an input/output terminal for a signal, the electrostatic protection circuit including: a first and second diodes having the respective cathode electrodes thereof connected in series at a first common connection point between the first power supply terminal and input/output terminal; a third and fourth diodes having the respective anode electrodes thereof connected in series at a second common connection point between the second power supply terminal and input/output terminal; a first discharge element, connected between the first and second common connection points, for discharging excessive static electricity; and a second discharge element, connected between the first and second power supply terminals, for discharging excessive static elec
    Type: Grant
    Filed: September 27, 2005
    Date of Patent: August 4, 2009
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Kentaro Watanabe, Hiroyuki Yoshinaga
  • Patent number: 7543138
    Abstract: An image registration server stores encryption keys of respective ones of a plurality of client terminals. Image data is encrypted by the image registration server using the encryption key corresponding to the client terminal to which the image data is applied. The encrypted image data is applied to the client terminal via a server. The client terminal has a decryption key stored within so that only a client terminal that is duly authorized can decrypt encrypted image data. Other client terminals that are not duly authorized cannot decode the image data. This makes it possible to prevent unlawful use of image data even if the image data has been intercepted.
    Type: Grant
    Filed: September 22, 2000
    Date of Patent: June 2, 2009
    Assignee: Fujifilm Corporation
    Inventors: Yoshiki Kawaoka, Norihisa Haneda, Hiroshi Suganuma, Hiroyuki Yoshinaga
  • Patent number: 7310159
    Abstract: An image outputting system that can keep the printed image quality always in good condition by correcting printing color tone based on printing color correcting information received via a network. The image outputting system comprises: an image outputting apparatus including a flat-bed scanner for reading an image, printers for printing the image, a network interface or a modem connectable with external devices via a network, and a correcting device for correcting printing color tone based on printing color correcting information received via the network; and a network server connected to the network for sending the printing color correcting information to the image outputting apparatus via the network. Thus, the network server controls the printing unit based on status information acquired from the image outputting apparatus and always keep the printed image quality in good condition.
    Type: Grant
    Filed: November 8, 2000
    Date of Patent: December 18, 2007
    Assignee: Fujifilm Corporation
    Inventors: Haruo Soeda, Yoshiki Kawaoka, Hiroyuki Yoshinaga
  • Publication number: 20060109595
    Abstract: An electrostatic protection circuit being an integrated circuit on a semiconductor substrate and including a first power supply terminal having a predetermined potential VDD, a second power supply terminal having a lower potential VSS than the predetermined potential, and an input/output terminal for a signal, the electrostatic protection circuit including: a first and second diodes having the respective cathode electrodes thereof connected in series at a first common connection point between the first power supply terminal and input/output terminal; a third and fourth diodes having the respective anode electrodes thereof connected in series at a second common connection point between the second power supply terminal and input/output terminal; a first discharge element, connected between the first and second common connection points, for discharging excessive static electricity; and a second discharge element, connected between the first and second power supply terminals, for discharging excessive static elec
    Type: Application
    Filed: September 27, 2005
    Publication date: May 25, 2006
    Inventors: Kentaro Watanabe, Hiroyuki Yoshinaga
  • Publication number: 20050162790
    Abstract: An electrostatic discharge protection circuit comprises an input terminal, an output terminal connected to the input terminal via a transmission line, and connected to a circuit to be protected, and a filter circuit disposed in the transmission line, wherein the filter circuit includes at least one inductor disposed in the transmission line between the input terminal and the output terminal, and connected in series when a plurality of inductors are arranged, and at least one electrostatic discharge protection device connected between the transmission line and a reference potential line, the filter circuit being symmetrically configured in terms of an equivalent circuit between the input terminal and the output terminal.
    Type: Application
    Filed: August 24, 2004
    Publication date: July 28, 2005
    Inventor: Hiroyuki Yoshinaga
  • Patent number: 6284499
    Abstract: A method for producing L-sorbose by microbiological oxidation of D-sorbitol which comprises adding D-sorbitol to a culture liquid in such a concentration that it does not go up to over about 5% during and after the growth phase of a microorganism used, while circulating a culture exhaust gas enriched with oxygen gas, and releasing a part of said exhaust gas out of the system. An apparatus for culturing microorganisms suitable for the method is also disclosed.
    Type: Grant
    Filed: August 3, 1993
    Date of Patent: September 4, 2001
    Assignee: BASF Aktiengesellschaft
    Inventors: Katsumitsu Kishimoto, Kazuhiko Kintaka, Hiroyuki Yoshinaga