Patents by Inventor Hisaaki Hayashi
Hisaaki Hayashi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 6927752Abstract: An electric field shielding wiring is provided in the gap between the pixel electrodes adjacent in parallel to the signal line, to minimize the inter-electrode parasitic capacity generated in the gap between the pixel electrodes, which is caused by the change in the pixel potential of the pixel electrode when the polarity of the signal line potential is changed, and prevent an increase in the pixel potential of the pixel electrode of the previous stage.Type: GrantFiled: September 4, 2002Date of Patent: August 9, 2005Assignee: Kabushiki Kaisha ToshibaInventor: Hisaaki Hayashi
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Publication number: 20030043328Abstract: An electric field shielding wiring is provided in the gap between the pixel electrodes adjacent in parallel to the signal line, to minimize the inter-electrode parasitic capacity generated in the gap between the pixel electrodes, which is caused by the change in the pixel potential of the pixel electrode when the polarity of the signal line potential is changed, and prevent an increase in the pixel potential of the pixel electrode of the previous stage.Type: ApplicationFiled: September 4, 2002Publication date: March 6, 2003Inventor: Hisaaki Hayashi
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Patent number: 6359666Abstract: An active matrix-liquid crystal display device includes an array substrate 100 on which pixel electrodes 151, signal lines 103 with first and second conductive layers 103a and 103b are formed. The first conductive layers 103a and the pixel electrodes 151 are subject to patterning using a same mask in a same optical exposure process. The first conductive layers 103a are wider in width than the second conductive layers 103b. The pixel electrodes 151 and the signal lines 103 maintain constant relative positions on display areas thereby to hardly cause unevenness of resultant images and to enable the device to display better dignity images.Type: GrantFiled: July 23, 1999Date of Patent: March 19, 2002Assignee: Kabushiki Kaisha ToshibaInventors: Hisaaki Hayashi, Sakae Yoshida
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Patent number: 6163358Abstract: A liquid crystal layer is sealed between an array substrate and an opposed substrate arranged to oppose each other with a gap. A multiplicity of particulate spacers are arranged between the array and opposed substrates to maintain the gap therebetween. The array substrate is formed with a transparent insulating film covering signal lines, scanning lines, switching elements and pixel electrodes. The areas of the insulating film opposing the respective pixel electrodes are each formed with a plurality of apertures for limiting the movement of the spacers.Type: GrantFiled: October 2, 1998Date of Patent: December 19, 2000Assignee: Kabushiki Kaisha ToshibaInventors: Masanobu Nonaka, Hisaaki Hayashi, Koichi Shiba, Tomiaki Yamamoto, Osamu Hoshino
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Patent number: 6157433Abstract: A conductor layer is formed on a glass substrate of a liquid-crystal display device, and a resist layer is formed on the conductor layer. The resist layer is dividedly exposed into a plurality of divided regions. Then the conductor layer is etched through the resist layer and patterned. At the time of the division exposure, a boundary line of each of the respective divided regions is formed in a zigzag shape and engaged with a boundary line of another adjacent one of the divided regions. The zigzag-shaped boundary line of each divided region has such a pattern as to extend into another diagonally opposed one of the divided regions at a cross-shaped region where a vertical boundary line horizontally dividing the divided regions and a horizontal boundary line vertically dividing the divided regions intersect at right angles.Type: GrantFiled: March 12, 1999Date of Patent: December 5, 2000Assignee: Kabushiki Kaisha ToshibaInventors: Noboru Kashimoto, Hisaaki Hayashi
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Patent number: 6130654Abstract: In an active-matrix type liquid crystal display device, a dummy scanning line is provided at a higher position than the top of ordinary scanning liens in the case that a scanning operation is performed from the top of a display region to the bottom thereof. Alternatively, such a dummy scanning line is disposed at a lower position than the bottom of ordinary scanning lines where the scanning operation is performed from the bottom of the display region to the top thereof. Scanning pulses to turn on switching elements as well as compensation pulses are applied to the dummy scanning line as to the ordinary scanning lines to obtain a uniform brightness display on a screen of the active-matrix type liquid crystal display device.Type: GrantFiled: February 24, 1998Date of Patent: October 10, 2000Assignee: Kabushiki Kaisha ToshibaInventors: Hisaaki Hayashi, Makoto Shibusawa
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Patent number: 6115089Abstract: A liquid crystal display device includes an array substrate provided with pixel electrodes and a counter electrode provided opposite to the array substrate, and a liquid crystal layer held between the array and counter substrates. The liquid crystal layer, and the array and counter electrode define a liquid crystal capacitor. The array substrate disposed on an insulation substrate includes a plurality of signal and scanning lines crossing each other. A thin film transistor is provided in the vicinity of each crossing point. The thin film transistor is connected to the pixel electrode. A storage capacitance is defined between the pixel electrode and a storage capacitance line. A parasitic capacitance is further defined between the pixel electrode and the signal line. The parasitic capacitance is 4% or less of an entire pixel capacitance including the liquid crystal, storage and parasitic capacitance in order to avoid crosstalk between the pixels.Type: GrantFiled: April 29, 1998Date of Patent: September 5, 2000Assignee: Kabushiki Kaisha ToshibaInventor: Hisaaki Hayashi
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Patent number: 6094248Abstract: A circuit array substrate for a display device includes a plurality of parallel signal and scanning lines disposed on an insulation substrate which cross each other at a right angle. The signal lines are made of at least upper and lower laminated layers. The upper layers made of aluminum or aluminum alloy are wider in width at the crossing portions with said scanning lines than the lower layers made of indium tin oxide. If the lower layers have cracks at the crossing portions during their patterning process, the wider upper layers cover the lower layers to keep etchant for the aluminum from soaking into the cracks. Thus, such a structure of the signal lines avoids causing the signal lines to break or malfunction.Type: GrantFiled: April 8, 1999Date of Patent: July 25, 2000Assignee: Kabushiki Kaisha ToshibaInventor: Hisaaki Hayashi
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Patent number: 5956104Abstract: An active matrix-liquid crystal display device includes an array substrate 100 on which pixel electrodes 151, signal lines 103 with first and second conductive layers 103a and 103b are formed. The first conductive layers 103a and the pixel electrodes 151 are subject to patterning using a same mask in a same optical exposure process. The first conductive layers 103a are wider in width than the second conductive layers 103b. The pixel electrodes 151 and the signal lines 103 maintain constant relative positions on display areas thereby to hardly cause unevenness of resultant images and to enable the device to display better dignity images.Type: GrantFiled: March 10, 1998Date of Patent: September 21, 1999Assignee: Kabushiki Kaisha ToshibaInventors: Hisaaki Hayashi, Sakae Yoshida
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Patent number: 5744837Abstract: A semiconductor device comprising a matrix array, an auxiliary line, and static electricity discharging circuit. The matrix array has a plurality of address lines, a plurality of data lines, and switching elements provided at intersections of the address lines and the data lines. The auxiliary line surrounds the matrix array. The static electricity discharging circuit is connected between the auxiliary line and the address and/or data lines. The static electricity discharging circuit comprises a first discharge circuit having a plurality of switching elements connected in series and a second discharge circuit having a plurality of switching elements connected in series.Type: GrantFiled: November 16, 1995Date of Patent: April 28, 1998Assignee: Kabushiki Kaisha ToshibaInventors: Norihiko Kamiura, Hisaaki Hayashi
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Patent number: 5657139Abstract: An array substrate for a flat-panel display device includes a glass substrate, a display section formed on the glass substrate and having pixel electrodes arrayed in row and column directions, pixel TFTs connected to the pixel electrodes for controlling the potentials thereof, and wiring lines including scan lines and signal lines which are connected to the pixel TFTs and extending to a removable area outside the display section, a short-circuit line formed in the removable area, surge-protection switch circuits formed in the removable area and connected between the short-circuit line and the wiring lines, each for electrically connecting a corresponding one of the wiring lines to the short-circuit line when the potential of the corresponding wiring line exceeds a predetermined level, and test pads formed in the removable area and connected to the wiring lines.Type: GrantFiled: September 29, 1995Date of Patent: August 12, 1997Assignee: Kabushiki Kaisha ToshibaInventor: Hisaaki Hayashi
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Patent number: 5598695Abstract: A rotor type open-end spinning unit has a collecting section collecting an opened and supplied fiber to make a fiber bundle. The fiber bundle is drawn through a yarn drawing passage to spin a yarn while twisting the fiber bundle. A rotatable outer rotor has an open end, a closed end and a peripheral wall. The peripheral wall has the collecting section on an inner surface thereof. The collecting section is located on a plane perpendicular to the rotational axis of the rotor. An inner rotor is located in the outer rotor and is driven independently. The inner rotor faces an end of the yarn drawing passage. A yarn path is provided with the inner rotor for guiding the fiber bundle from the collecting section to the yarn drawing passage. A first guide is provided with the inner rotor for contacting the fiber bundle guided to the yarn drawing passage through the yarn path from a frontward location with respect to the rotational direction of the inner rotor.Type: GrantFiled: July 26, 1995Date of Patent: February 4, 1997Assignee: Kabushiki Kaisha Toyoda Jidoshokki SeisakushoInventors: Masashi Kaneko, Noriaki Miyamoto, Yasuyuki Kawai, Hisaaki Hayashi