Patents by Inventor Hisaaki Yoshida

Hisaaki Yoshida has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8530966
    Abstract: A semiconductor device includes a trench extending from a surface of a P-base layer to a surface of a P-well layer. The trench has a trench end portion defined in the surface of the P-well layer and in a direction in which the trench extends. The trench has first and second regions. The first region extends from the trench end portion to get into the surface of the P-base layer near a boundary between the P-base layer and the P-well layer. The second region extends in the surface of the P-base layer from an end portion of the first region. A trench width is greater in the first region than in the second region.
    Type: Grant
    Filed: August 8, 2011
    Date of Patent: September 10, 2013
    Assignee: Mitsubishi Electric Corporation
    Inventors: Atsushi Narazaki, Hisaaki Yoshida, Kazuaki Higashi
  • Publication number: 20120153382
    Abstract: A semiconductor device includes a trench extending from a surface of a P-base layer to a surface of a P-well layer. The trench has a trench end portion defined in the surface of the P-well layer and in a direction in which the trench extends. The trench has first and second regions. The first region extends from the trench end portion to get into the surface of the P-base layer near a boundary between the P-base layer and the P-well layer. The second region extends in the surface of the P-base layer from an end portion of the first region. A trench width is greater in the first region than in the second region.
    Type: Application
    Filed: August 8, 2011
    Publication date: June 21, 2012
    Applicant: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Atsushi NARAZAKI, Hisaaki YOSHIDA, Kazuaki HIGASHI
  • Patent number: 5635413
    Abstract: An element separating oxide film is formed in a surface of a p-type silicon substrate for separation of an element forming region. A p-type impurity diffusion region extends from the vicinity of a lower surface of the element separating oxide film to a position at a predetermined depth in the element forming region. The p-type impurity diffusion region has a peak of concentration of impurity. In the element forming region adjacent to the element separating oxide film, an n.sup.+ impurity diffusion region is formed on the surface of the p-type silicon substrate. An n.sup.- impurity diffusion region adjacent to the n.sup.+ impurity diffusion region is formed between the n.sup.+ impurity diffusion region and the p-type impurity diffusion region.
    Type: Grant
    Filed: May 8, 1995
    Date of Patent: June 3, 1997
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Kazumasa Mitsunaga, Kaoru Motonami, Hisaaki Yoshida
  • Patent number: 5440165
    Abstract: An element separating oxide film is formed in a surface of a p-type silicon substrate for separation of an element forming region. A p-type impurity diffusion region extends from the vicinity of a lower surface of the element separating oxide film to a position at a predetermined depth in the element forming region. The p-type impurity diffusion region has a peak of concentration of impurity. In the element forming region adjacent to the element separating oxide film, an n.sup.+ impurity diffusion region is formed on the surface of the p-type silicon substrate. An n.sup.- impurity diffusion region adjacent to the n.sup.+ impurity diffusion region is formed between the n.sup.+ impurity diffusion region and the p-type impurity diffusion region.
    Type: Grant
    Filed: September 12, 1994
    Date of Patent: August 8, 1995
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Kazumasa Mitsunaga, Kaoru Motonami, Hisaaki Yoshida