Patents by Inventor Hisaharu Ogawa

Hisaharu Ogawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 4173756
    Abstract: An abnormal voltage detection circuit includes a series circuit of a resistor and a capacitor coupled across a power source by means of a switch, an inverter with the input terminal coupled to the junction of the resistor and capacitor, and an R-S flip-flop circuit with the set and reset input terminals coupled to the output terminal of the inverter and a manual switch respectively. The R-S flip-flop circuit is set by a first threshold voltage lower than the threshold voltage of the inverter, and reset by a second threshold voltage higher than the threshold voltage of the inverter.
    Type: Grant
    Filed: December 7, 1977
    Date of Patent: November 6, 1979
    Assignee: Tokyo Shibaura Electric Co., Ltd.
    Inventors: Kenji Kawagai, Shigeki Yoshida, Hisaharu Ogawa, Toshiro Ohashi
  • Patent number: 4123671
    Abstract: An integrated driver circuit comprises a signal-generating circuit for sending forth output signals when a power source voltage is impressed thereto; a level converting means for changing the level of one of the output signals into a control signal having a voltage n-fold (n>1) larger than the power source voltage; and at least one field effect transistor arranged to be rendered conducting or non-conducting according to said control signal for selective actuation of external display means provided outside of the integrated driver circuit.
    Type: Grant
    Filed: April 21, 1977
    Date of Patent: October 31, 1978
    Assignee: Tokyo Shibaura Electric Co., Ltd.
    Inventors: Mitsuo Aihara, Hisaharu Ogawa
  • Patent number: 4015146
    Abstract: This negative resistance network includes a first predetermined channel insulated gate enhancement type field effect transistor having a drain-source path connected to positive and negative input terminals on which a predetermined input voltage is impressed.
    Type: Grant
    Filed: December 16, 1975
    Date of Patent: March 29, 1977
    Assignee: Tokyo Shibaura Electric Co., Ltd.
    Inventors: Mitsuo Aihara, Shigeho Takada, Hisaharu Ogawa