Abstract: An information processing apparatus includes a request obtaining unit, a request memory, a timeout value obtaining unit, a determining unit, and a discarding unit. The request obtaining unit sequentially obtains requests from plural external apparatuses. The request memory stores the requests. The timeout value obtaining unit obtains timeout values, each of the timeout values indicating a time until transmission of a request from one of the plural external apparatuses is stopped. The determining unit determines, in a case where a request is obtained, whether or not the request memory has enough space for additionally storing the request. The discarding unit discards, in a case where the determining unit determines that the request memory does not have the enough space, a request that is selected in accordance with the timeout values obtained by the timeout value obtaining unit.

Abstract: A power-saving control device includes a setting unit and a mode controller. The setting unit sets a period during which an information processing apparatus in a power-saving mode in which more power is saved than a first mode is caused to perform an operation for receiving data from a communication line. The mode controller sets the information processing apparatus to a second mode in which the receiving operation is performed when a current time is within the set period, and sets the information processing apparatus to a third mode in which the receiving operation is stopped when the current time is outside the set period, in a case where the information processing apparatus is in the power-saving mode.

Abstract: An information processing apparatus includes a network interface, a main arithmetic unit, a sub arithmetic unit, and a data switch. The main arithmetic unit is activated in response to power being supplied thereto, and performs arithmetic operation on the basis of a preset first program. The sub arithmetic unit performs arithmetic operation on the basis of a second program written by the main arithmetic unit. The data switch switches, under control of the sub arithmetic unit, a path of data communicated between the network interface and the main arithmetic unit or the sub arithmetic unit. The data switch is configured to communicate, in an initial state, the data between the network interface and the main arithmetic unit.

Abstract: A response device includes a memory, a reception unit, and a response unit. The memory stores a logical address and a physical address in a communication circuit which are assigned to an external information processing device connected to the communication circuit that is the same as a communication circuit to which the response device is connected. The reception unit receives an address request for requesting a physical address from the communication circuit. The response unit responds with the stored physical address of the information processing device in a case where a destination address of the received address request is equal to the stored logical address of the information processing device.

Abstract: An information processing apparatus includes a first central processing unit, a second central processing unit, and a returning unit. The first central processing unit has a normal operating state and a power-saving state in which power consumption is lower than in the normal operating state. The second central processing unit causes the first central processing unit to return to the normal operating state from the power-saving state. The returning unit causes the first central processing unit to return to the normal operating state in a case where the second central processing unit enters an anomalous state after the first central processing unit has entered the power-saving state.

Abstract: An information processing apparatus includes a first central processing unit, a second central processing unit, and a returning unit. The first central processing unit has a normal operating state and a power-saving state in which power consumption is lower than in the normal operating state. The second central processing unit causes the first central processing unit to return to the normal operating state from the power-saving state. The returning unit causes the first central processing unit to return to the normal operating state in a case where the second central processing unit enters an anomalous state after the first central processing unit has entered the power-saving state.

Abstract: A processing apparatus includes following components. Processing units each operate when being supplied with power. A first detector detects an object entering a first detection area. A second detector detects an object entering a second detection area. A first controller controls power supply to the processing units and the first and second detectors. At a start of a power-saving mode, the first controller stops supplying power to the second detector and at least one processing unit and supplies power to the first detector. After the start of the power-saving mode, the first controller restarts supplying power to the second detector when the first detector detects an object entering the first detection area. When the second detector detects an object entering the second detection area in the power-saving mode, the first controller restarts supplying power to the at least one processing unit so as to cancel the power-saving mode.

Abstract: A power supplying control apparatus includes a transition unit that causes a control apparatus to transition to one of a power supplied state that causes power to be supplied and a power shutoff state that shuts off the supplying of power, and a determining unit that determines a transition target of the transition unit in accordance with a first time period and a second time period, the first time period having a length of time beyond which no further memory space is available from a second memory, and thus being determined by a transmission and reception speed of information to a communication line network and a storage capacity of the second memory, the second time period being so long as to enable information stored on the second memory to be stored on a first memory in the power shutoff state.

Abstract: A processing apparatus includes following components. Processing units each operate when being supplied with power. A first detector detects an object entering a first detection area. A second detector detects an object entering a second detection area. A first controller controls power supply to the processing units and the first and second detectors. At a start of a power-saving mode, the first controller stops supplying power to the second detector and at least one processing unit and supplies power to the first detector. After the start of the power-saving mode, the first controller restarts supplying power to the second detector when the first detector detects an object entering the first detection area. When the second detector detects an object entering the second detection area in the power-saving mode, the first controller restarts supplying power to the at least one processing unit so as to cancel the power-saving mode.

Abstract: According to an aspect of the invention, an information processing apparatus includes a control unit. The control unit changes a power supply state of the information processing apparatus from a first power supply state where a communication function of the apparatus is activated to a second power supply state where the communication function is inactivated based on a given period and a restoration cause, the control unit keeping the power supply state in the second power supply state in the given period, the control unit keeping the power supply state in the second power supply state after the given period when the restoration cause is detected in the given period.

Abstract: A power supplying control apparatus includes a transition unit that causes a control apparatus to transition to one of a power supplied state that causes power to be supplied and a power shutoff state that shuts off the supplying of power, and a determining unit that determines a transition target of the transition unit in accordance with a first time period and a second time period, the first time period having a length of time beyond which no further memory space is available from a second memory, and thus being determined by a transmission and reception speed of information to a communication line network and a storage capacity of the second memory, the second time period being so long as to enable information stored on the second memory to be stored on a first memory in the power shutoff state.

Abstract: According to an aspect of the invention, an information processing apparatus includes a control unit. The control unit changes a power supply state of the information processing apparatus from a first power supply state where a communication function of the apparatus is activated to a second power supply state where the communication function is inactivated based on a given period and a restoration cause, the control unit keeping the power supply state in the second power supply state in the given period, the control unit keeping the power supply state in the second power supply state after the given period when the restoration cause is detected in the given period.

Abstract: A controller includes a first memory of non-volatile that stores a program; a processor that executes the program; and a second memory that provides a work area for the processor. In this controller, the processor executes the program read from the first memory and stored in the second memory as a first mode, and executes the program stored in the first memory as a second mode.

Abstract: A controller includes a first memory of non-volatile that stores a program; a processor that executes the program; and a second memory that provides a work area for the processor. In this controller, the processor executes the program read from the first memory and stored in the second memory as a first mode, and executes the program stored in the first memory as a second mode.