Patents by Inventor Hisaji Nakao

Hisaji Nakao has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 4408933
    Abstract: A contact detecting apparatus for detecting the contact of a workpiece with a tool in a machine tool which includes a magnetic coil mounted on the periphery of a spindle head and connected to an AC power source for generating an induced current in a looped secondary circuit including the workpiece, a work table, a machine body, a spindle head, a tool spindle and the tool, when the workpiece and the tool are moved relatively into contact with each other. A first conductive wire forming a secondary winding of one turn is arranged in a parallel relationship with the looped secondary circuit and a current induced therein by energization of the magnetic coil. A second conductive wire is connected at one end thereof to the looped secondary circuit. A detecting device is connected to the first and second conductive wires for detecting contact between the workpiece and the tool based on the voltage induced across the first and second conductive wires.
    Type: Grant
    Filed: March 10, 1981
    Date of Patent: October 11, 1983
    Assignee: Toyoda Koki Kabushiki Kaisha
    Inventors: Tamaki Tomita, Hisaji Nakao, Hideo Nishimura, Kunihiko Eto, Haruo Ohmura
  • Patent number: 4385367
    Abstract: A sequence block display system used with a programmable sequence controller for displaying a sequence block on a screen of a cathode-ray tube display unit in the form of ladder diagram. The sequence block display system is provided with a data processor and a buffer memory which includes first, second and third memories. The first memory is capable of storing the whole of sequence programs stored in the sequence controller and the second memory is capable of storing at least one sequence block. The third memory is adapted to store output instructions, which are used to designate a sequence block, in the same order as each designated sequence block is displayed on the screen and further to read out the output instructions in the reverse order for displaying the sequence blocks which are put out of the screen.
    Type: Grant
    Filed: December 11, 1980
    Date of Patent: May 24, 1983
    Assignee: Toyoda Koki Kabushiki Kaisha
    Inventors: Hisaji Nakao, Hideo Nishimura, Toshihiko Yomogida, Masaharu Fujisaki
  • Patent number: 4025902
    Abstract: A general purpose sequence controller wherein a schematic electric circuit diagram comprising a ladder network of circuit lines disposed between two vertical bus lines is changeable and simulated by a special purpose control program. A logic operation circuit comprises first and second circuit means for examining an external input signal in accordance with examine commands of logical AND and OR functions, respectively, first and second memory means for temporarily memorizing the examined results of the first and second circuit means, respectively, third memory means for temporarily memorizing the application of the examine command of the logical OR function, and identifying circuit means for identifying the examined results of the logic operations in accordance with the contents of the first, second and third memory means.
    Type: Grant
    Filed: June 13, 1974
    Date of Patent: May 24, 1977
    Assignee: Toyoda Koki Kabushiki Kaisha
    Inventors: Hisaji Nakao, Katutoshi Naruse, Kazuhiko Hasegawa, Sadao Kawade, Yasufumi Tokura, Kazuo Matsuno
  • Patent number: 4019175
    Abstract: A programmable sequence controller is disclosed which includes a controller memory having at least one read-only memory unit for storing a sequence program comprising a series of instructions each including an operation code and address information. An operation control device is also provided for examining an external input in accordance with an appropriate instruction. An input network permits application of external inputs designated by the address information to the operation control device, and an output network is provided for transmitting a control signal based on the examination result from the operation control device. A program input network including a read-write memory is provided for storing a part of the sequence program, which part is loadable in one read-only memory unit.
    Type: Grant
    Filed: April 15, 1975
    Date of Patent: April 19, 1977
    Assignees: Toyoda Koki Kabushiki Kaisha, Toyota Jidosha Kogyo Kabushiki Kaisha
    Inventors: Hisaji Nakao, Yasufumi Tokura, Kazuo Matsuno, Toshihiko Yomogida
  • Patent number: 3996565
    Abstract: A sequence controller comprising a logic operation circuit for examining an external input with an examine command in accordance with a program. The logic operation circuit comprises block means for discontinuing a next examination of a logical function of a group of logical functions in response to a preceeding examination result of a logical function to thereby execute a logic operation non-sequentially.
    Type: Grant
    Filed: July 3, 1974
    Date of Patent: December 7, 1976
    Assignees: Toyoda Koki Kabushiki Kaisha, Toyoda Jidosha Kogyo Kabushiki Kaisha
    Inventors: Hisaji Nakao, Yasufumi Tokura, Toshihiko Yomogida, Kazuo Matsuura
  • Patent number: 3946212
    Abstract: An automatic quality control system for a machine which measures workpieces processed by the machine. An estimated value to be obtained from an unprocessed workpiece depending upon information obtained from previously processed workpieces is calculated and is compared with a predetermined control limit. An instruction signal is generated when the estimated value is beyond the control limit to indicate a need for adjustment of the machine.
    Type: Grant
    Filed: June 18, 1974
    Date of Patent: March 23, 1976
    Assignees: Toyota Jidosha Kokyo Kabushiki Kaisha, Toyota Jidosha Kokyo Rabushiki Kaisha
    Inventors: Hisaji Nakao, Nobuo Fukuma, Hideyuki Matsubara, Tadahiro Takasu, Takao Yoneda