Patents by Inventor Hisaji Nisimura

Hisaji Nisimura has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • SOI semiconductor device having gettering layer and method for producing the same
    Patent number: 6830986
    Abstract: An SOI semiconductor device includes at least an SOI substrate including an insulating film and a semiconductor layer formed on the insulating film; and an active semiconductor element formed on the semiconductor layer. The active semiconductor element is formed in an element formation region surrounded by an isolating region for isolating the semiconductor layer in a form of an island. A gettering layer containing a high concentration impurity is formed in a portion of the semiconductor layer excluding the element formation region in which the active semiconductor element is formed, and the gettering layer is not formed in the element formation region in which the active semiconductor element is formed.
    Type: Grant
    Filed: January 17, 2003
    Date of Patent: December 14, 2004
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Katsushige Yamashita, Hisaji Nisimura, Hiromu Yamazaki, Masaki Inoue, Yoshinobu Satoh