Patents by Inventor Hisakazu MARUTANI

Hisakazu MARUTANI has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Manufacturing method of semiconductor package including laser processing
    Patent number: 10529635
    Abstract: A manufacturing method of a semiconductor package includes locating a plurality of semiconductor packages on a substrate, forming a resin insulating layer covering the plurality of semiconductor devices, forming grooves, in the resin insulating layer, enclosing each of the plurality of semiconductor devices and reaching the substrate, and irradiating the substrate with laser light in positional correspondence with the grooves to separate the plurality of semiconductor devices from each other.
    Type: Grant
    Filed: April 21, 2017
    Date of Patent: January 7, 2020
    Assignee: J-Devices Corporation
    Inventors: Hisakazu Marutani, Minoru Kai, Kazuhiko Kitano
  • SEMICONDUCTOR PACKAGE AND MANUFACTURING METHOD OF SEMICONDUCTOR PACKAGE
    Publication number: 20170316998
    Abstract: A manufacturing method of a semiconductor package includes locating a plurality of semiconductor packages on a substrate, forming a resin insulating layer covering the plurality of semiconductor devices, forming grooves, in the resin insulating layer, enclosing each of the plurality of semiconductor devices and reaching the substrate, and irradiating the substrate with laser light in positional correspondence with the grooves to separate the plurality of semiconductor devices from each other.
    Type: Application
    Filed: April 21, 2017
    Publication date: November 2, 2017
    Inventors: Hisakazu MARUTANI, Minoru KAI, Kazuhiko KITANO
  • Semiconductor device and manufacturing method thereof
    Patent number: 8786110
    Abstract: A semiconductor device comprising a support plate, a semiconductor element mounted on the support plate and including a circuit element surface having a plurality of first electrodes, a first insulation layer covering the circuit element surface of the semiconductor element, and including a plurality of first apertures exposing the plurality of first electrodes, a second insulation layer covering an upper part of the support plate and side parts of the semiconductor element, and wirings formed on an upper part of the first insulation layer and on an upper part of the second insulation layer, and electrically connected to the corresponding first electrodes.
    Type: Grant
    Filed: March 30, 2011
    Date of Patent: July 22, 2014
    Assignee: J-Devices Corporation
    Inventors: Hisakazu Marutani, Yasunari Iwami, Tomoshige Chikai, Tomoko Takahashi, Osamu Yamagata, Shingo Mitsugi, Chunghao Chen
  • SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF
    Publication number: 20120074594
    Abstract: A semiconductor device comprising a support plate, a semiconductor element mounted on the support plate and including a circuit element surface having a plurality of first electrodes, a first insulation layer covering the circuit element surface of the semiconductor element, and including a plurality of first apertures exposing the plurality of first electrodes, a second insulation layer covering an upper part of the support plate and side parts of the semiconductor element, and wirings formed on an upper part of the first insulation layer and on an upper part of the second insulation layer, and electrically connected to the corresponding first electrodes.
    Type: Application
    Filed: March 30, 2011
    Publication date: March 29, 2012
    Applicant: J-DEVICES CORPORATION
    Inventors: Hisakazu MARUTANI, Yasunari Iwami, Tomoshige Chikai, Tomoko Takahashi, Osamu Yamagata, Shingo Mitsugi, Chunghao Chen