Abstract: According to one embodiment, there is provided a semiconductor device including a stacked body, a semiconductor columnar member, an insulating film, and a structure. The stacked body is disposed above a semiconductor substrate. In the stacked body, a conductive film and an insulating layer are alternately disposed in a stacking direction. The semiconductor columnar member penetrates the stacked body in the stacking direction. The insulating film surrounds the semiconductor columnar member and penetrates the stacked body in the stacking direction. The structure is disposed in a peripheral circuit region on the semiconductor substrate. The peripheral circuit region is a region including a plurality of circuit blocks. The structure has a plate-shaped portion extending at least between the plurality of circuit blocks.

Abstract: According to one embodiment, there is provided a semiconductor device including a stacked body, a semiconductor columnar member, an insulating film, and a structure. The stacked body is disposed above a semiconductor substrate. In the stacked body, a conductive film and an insulating layer are alternately disposed in a stacking direction. The semiconductor columnar member penetrates the stacked body in the stacking direction. The insulating film surrounds the semiconductor columnar member and penetrates the stacked body in the stacking direction. The structure is disposed in a peripheral circuit region on the semiconductor substrate. The peripheral circuit region is a region including a plurality of circuit blocks. The structure has a plate-shaped portion extending at least between the plurality of circuit blocks.

Abstract: According to one embodiment, a semiconductor device includes: a first transistor including a first stack in which a first oxide, a first nitride, a first conductor, and a second nitride are subsequently stacked; and first regions bracketing the first stack; and a second transistor including a second stack in which a second oxide, a second conductor, and a third nitride are subsequently stacked; and second regions bracketing the second stack, wherein the first transistor further includes a third oxide provided on the first regions and a fourth nitride consecutively provided on the third oxide and the second nitride, and the second transistor further includes a fourth oxide consecutively provided on the second regions and the third nitride, and a fifth nitride provided on the fourth oxide.

Abstract: According to an embodiment, a semiconductor memory device includes a substrate, a stacked body, a first insulating film, and a first film. The stacked body is provided on the substrate. The stacked body includes a plurality of electrode films extending in a first direction along an upper surface of the substrate and stacked with spacing from each other. An end part of the stacked body has a stepped shape provided with a terrace for each of the electrode films. The first insulating film is provided on the end part of the stacked body. The first film is provided on the first insulating film, and extends in a direction tilted with respect to the first direction.

Abstract: A semiconductor memory device includes a semiconductor substrate, a plurality of NAND strings each of which includes a plurality of memory cells provided on the semiconductor substrate and disposed in a first direction, and a select gate provided adjacent to the memory cell at an end portion of the plurality of memory cells, such that two select gates face each other at the ends of their respective memory cells, and a first spacer layer formed on a side wall between the select gates of the NAND strings disposed adjacent to each other. The first spacer layer includes a recess therein at the portion thereof located adjacent to the semiconductor substrate.

Abstract: A nonvolatile semiconductor storage device includes a semiconductor substrate; a first insulating film disposed above the semiconductor substrate; a first electrode film disposed above the first insulating film; a second insulating film disposed above the first electrode film; a second electrode film disposed above the second insulating film; a third electrode film filling a first trench and overlying the second electrode film, the first trench having a first width and a first depth and extending through the second electrode film and the second insulating film and into the first electrode film; and a first barrier metal film and a first metal film disposed above the third electrode film; wherein the third electrode film above the second electrode film has a first thickness equal to or less than ½ of the first width of the first trench.

Abstract: According to one embodiment, a memory cell transistor is obtained by forming a first gate insulating film, a first conductive film of a first conductivity type, a first inter-electrode insulating film, and a second conductive film of the first conductivity type, in this order, and a peripheral transistor which is obtained by forming a second gate insulating film, a third conductive film of the second conductivity type opposite to the first conductivity type, the inter-electrode insulating film, a fourth conductive film in which the first conductivity type dopant is doped, a barrier film, and a fifth conductive film in which the second conductivity type dopant is doped, in which in the peripheral transistor, an opening is formed on the barrier film, the fourth conductive film, and the inter-electrode insulating film, and the fifth conductive film is formed so as to come in contact with the third conductive film through the opening.

Abstract: A nonvolatile semiconductor storage device includes a semiconductor substrate; a first insulating film disposed above the semiconductor substrate; a first electrode film disposed above the first insulating film; a second insulating film disposed above the first electrode film; a second electrode film disposed above the second insulating film; a third electrode film filling a first trench and overlying the second electrode film, the first trench having a first width and a first depth and extending through the second electrode film and the second insulating film and into the first electrode film; and a first barrier metal film and a first metal film disposed above the third electrode film; wherein the third electrode film above the second electrode film has a first thickness equal to or less than ½ of the first width of the first trench.

Abstract: A method for manufacturing a semiconductor device has forming a first metal wire in a groove formed in an insulating film on a semiconductor substrate, forming an interlayer dielectric on the insulating film and the first metal wire, forming a via hole by etching the interlayer dielectric, forming a first barrier metal on sidewalls of the via hole, forming an organic film in the via hole having the first barrier metal formed therein, etching the first barrier metal exposed by performing an etchback on the organic film to a predetermined position, forming a trench integrally with an upper portion of the via hole by etching the interlayer dielectric to a predetermined position, forming a second barrier metal on the first barrier metal and sidewalls of the trench in the via hole, after the organic film remaining in the via hole is removed, and forming a second metal wire in the via hole and the trench having the second barrier metal formed therein.

Abstract: An interlayer insulator includes a first interlayer insulator and a second interlayer insulator formed on the first interlayer insulator and having a property of preventing diffusion of copper. A barrier metal film is formed on an inner wall in the wiring trench except an upper end and operative to prevent copper contained in the Cu wiring from diffusing into the interlayer insulator. The Cu wiring is brought into contact with the second interlayer insulator at the upper end and covered with the barrier metal film at a lower portion below the upper end.

Abstract: A method for manufacturing a semiconductor device has forming a first metal wire in a groove formed in an insulating film on a semiconductor substrate, forming an interlayer dielectric on the insulating film and the first metal wire, forming a via hole by etching the interlayer dielectric, forming a first barrier metal on sidewalls of the via hole, forming an organic film in the via hole having the first barrier metal formed therein, etching the first barrier metal exposed by performing an etchback on the organic film to a predetermined position, forming a trench integrally with an upper portion of the via hole by etching the interlayer dielectric to a predetermined position, forming a second barrier metal on the first barrier metal and sidewalls of the trench in the via hole, after the organic film remaining in the via hole is removed, and forming a second metal wire in the via hole and the trench having the second barrier metal formed therein.

Abstract: According to an aspect of the invention, there is provided a semiconductor device provided with a CMOS-FET circuit, comprising at least one of a tensile stress film disposed in a part of an element isolating film around an NMOS forming region and having a tensile stress, and a compressive stress film disposed in a part of an element isolating film around a PMOS forming region and having a compressive stress.

Abstract: An interlayer insulator includes a first interlayer insulator and a second interlayer insulator formed on the first interlayer insulator and having a property of preventing diffusion of copper. A barrier metal film is formed on an inner wall in the wiring trench except an upper end and operative to prevent copper contained in the Cu wiring from diffusing into the interlayer insulator. The Cu wiring is brought into contact with the second interlayer insulator at the upper end and covered with the barrier metal film at a lower portion below the upper end.

Abstract: A method of producing semiconductor devices is provided, which makes it possible to bury a silicon oxide without shape deterioration in device isolation trenches. The method comprises the steps of: forming an etching resistive mask over a semiconductor substrate; etching the semiconductor substrate through an opening in the etching resistive mask to form a device isolation trench; forming a coat of a silazane perhydride polymer solution over the semiconductor substrate having the device isolation trench formed therein; vaporizing a solvent from the coat and then subjecting the coat to chemical reaction to form a film of silicon oxide; removing said film of the silicon oxide leaving a residue inside said device isolation trench; and heating said silicon oxide left in said device isolation trench for densification.

Abstract: According to an aspect of the invention, there is provided a semiconductor device provided with a CMOS-FET circuit, comprising at least one of a tensile stress film disposed in a part of an element isolating film around an NMOS forming region and having a tensile stress, and a compressive stress film disposed in a part of an element isolating film around a PMOS forming region and having a compressive stress.

Abstract: A method of producing semiconductor devices is provided, which makes it possible to bury a silicon oxide without shape deterioration in device isolation trenches. The method comprises the steps of: forming an etching resistive mask over a semiconductor substrate; etching the semiconductor substrate through an opening in the etching resistive mask to form a device isolation trench; forming a coat of a silazane perhydride polymer solution over the semiconductor substrate having the device isolation trench formed therein; vaporizing a solvent from the coat and then subjecting the coat to chemical reaction to form a film of silicon oxide; removing said film of the silicon oxide leaving a residue inside said device isolation trench; and heating said silicon oxide left in said device isolation trench for densification.