Patents by Inventor Hisako Watanabe

Hisako Watanabe has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6031855
    Abstract: A light emitting element driving circuit which drives a light emitting element including the following. A drive transistor is coupled to a power supply voltage and is provided on a side of an anode of the light emitting element. The drive transistor receives an input signal and supplies the light emitting element with a pulse current and a bias current. A cathode of the light emitting element is connected to a lower potential than the power supply voltage.
    Type: Grant
    Filed: March 3, 1997
    Date of Patent: February 29, 2000
    Assignee: Fujitsu Limited
    Inventor: Hisako Watanabe
  • Patent number: 5563898
    Abstract: A reference-voltage generator controls the level of a reference voltage in dependence upon temperature, and a drive-current supply unit passes a drive current through a semiconductor laser when the voltage of an input signal is greater than (or less than) the reference voltage. Even if a threshold-value current of the semiconductor laser increases owing to a rise in ambient temperature, as a result of which there is an increase in the delay time of the optical power waveform of the laser, the reference voltage declines in conformity with the temperature rise and the time at which drive current begins to flow into the semiconductor laser is made earlier. This offsets the delay time so that a stabilized optical power waveform and optical output power are generated. In addition, a drive-current controller increases the value of drive current in conformity with a rise in temperature. As a result, the drive current which flows through the semiconductor laser increases in dependence upon the temperature rise.
    Type: Grant
    Filed: January 18, 1995
    Date of Patent: October 8, 1996
    Assignee: Fujitsu Limited
    Inventors: Tadashi Ikeuchi, Hisako Watanabe, Kazuyuki Mori
  • Patent number: 5265088
    Abstract: A cross-connection apparatus for B-ISDN includes plural interface units, multiplexers, virtual path identifier (VPI) conversion tables, demultiplexers, and loop-back units and a switch unit.
    Type: Grant
    Filed: June 2, 1992
    Date of Patent: November 23, 1993
    Assignees: Fujitsu Limited, Nippon Telegraph and Telephone Corporation
    Inventors: Yuji Takigawa, Masaaki Kawai, Hidetoshi Naito, Hisako Watanabe, Kazuyuki Tajima, Haruo Yamashita
  • Patent number: 5257311
    Abstract: A system for monitoring an ATM cross-connecting apparatus by inputting a test cell through a path for a main signal into the ATM cross-connecting apparatus, and examining the cell after the cell passed through the ATM cross-connecting apparatus. An initial value of a PN sequence and the PN sequence generated based on the initial bit sequence is written in the test cell before inputting to the ATM cross-connecting apparatus. When examining the test cell, the initial bit sequence and the PN sequence are read from the cell, a PN sequence is generated based on the initial bit sequence, and the generated pseudo-noise sequence is then compared with the PN sequence read from the test cell to detect an error in the test cell. In addition, a bit pattern indicating a primitive polynomial to generate the PN sequence may be written in the test cell. In this case, the bit pattern is used for generating the PN sequence when examining the test cell.
    Type: Grant
    Filed: April 30, 1992
    Date of Patent: October 26, 1993
    Assignee: Fujitsu Limited
    Inventors: Hidetoshi Naito, Masaaki Kawai, Hisako Watanabe, Yuji Takizawa, Kazuyuki Tajima, Haruo Yamashita
  • Patent number: 5001726
    Abstract: A circuit for generating a discrimination voltage level V.sub.ref which is used as a reference voltage to discriminate between two adjacent logic levels or an input signal which can have a plurality of different voltage levels generally corresponding to a plurality of respective, different logic levels. The frequency at which the levels of the input signals lie in the upper half of the vicinity (i.e., the voltage range from the level V.sub.ref -.DELTA.V to the level V.sub.ref +.DELTA.V) of the discrimination voltage level (i.e., the "upper half" thereof being the voltage range from V.sub.ref to V.sub.ref +.DELTA.V, ".DELTA.V" being a predetermined off-set value) and the frequency at which the levels of the input signals lie in the lower half of the vicinity (i.e., as above defined) of the discrimination level (i.e., the "low half" thereof being the voltage range from V.sub.ref -.DELTA.V to V.sub.ref) are compared, and the discrimination level is controlled so that the above two frequencies are the same.
    Type: Grant
    Filed: February 22, 1989
    Date of Patent: March 19, 1991
    Assignee: Fujitsu Limited
    Inventors: Masaaki Kawai, Hisako Watanabe, Tomoyuki Ohtsuka
  • Patent number: 4935701
    Abstract: A phase shift circuit used in a regenerating repeater, includes a separating unit for separating an input signal into two separate signals having a phase difference of a phase angle of therebetween, one separated signal having a "0" phase and the other separated signal having a ".pi./2" phase. A distributing unit distributes the "0" phase separated signal and ".pi./2" phase separated signal as three distributed signals having phase difference of phase angles of and therebetween, one distributed signal having a "0" phase and the others being a ".pi./2" phase distributed signal and a ".pi." phase distributed signal. A weighting/compounding unit analyzes the "0" phase distributed signal, ".pi./2" phase distributed signal, and ".pi.
    Type: Grant
    Filed: September 19, 1988
    Date of Patent: June 19, 1990
    Assignee: Fujitsu Limited
    Inventors: Masaaki Kawai, Hisako Watanabe, Tomoyuki Ohtsuka, Haruo Yamashita