Abstract: In an input buffer circuit arrangement, a comparator compares a filtered input signal applied to one input with each of a first and a second reference value preset at the other input by a first setting circuit to produce a comparison output signal. According to the comparison output signal, a second setting circuit provides a third and a fourth reference value to one input of the comparator to obtain a noise-resistive characteristic.

Abstract: A frequency-current conversion circuit adapted to a speedometer installed in a vehicle for converting the rate of rotation of an engine to a current signal wherein a first capacitor is charged to a predetermined value during the half cycle of an input signal and, then, a second capacitor is charged with the electric charge stored in the first capacitor during the half cycle of the input signal following the half cycle where the first capacitor is charged. When a voltage across the first capacitor reaches a predetermined value, the second capacitor stops charging. The smoothed direct current signal from the second capacitor, if necessary amplified by a current amplifier, drives a load.