Patents by Inventor Hisanao Akima

Hisanao Akima has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230297782
    Abstract: A non-transitory computer-readable storage medium storing an output program that causes at least one computer to execute a process, the process includes analyzing first meaning representations of a target sentence to generate a first combination of subjects, verbs, and objects in the target sentence; searching for a second combination of subjects, verbs, and objects based on a knowledge base obtained by analyzing second meaning representations of input text, the knowledge base storing information that indicates a third combination of subjects, verbs, and objects in sentences, the third combination in the sentence having the cause-effect relationship with fourth combinations of subjects, verbs, and objects in each of sentences in the input text; and outputting the searched second combination.
    Type: Application
    Filed: July 22, 2022
    Publication date: September 21, 2023
    Applicant: FUJITSU LIMITED
    Inventor: Hisanao AKIMA
  • Patent number: 11756616
    Abstract: A computer includes: a memristor array including memristors arranged at intersections between word lines and a first bit line in the memristor array and at intersections between the word lines and second bit lines in the memristor array; an adder circuit configured to obtain sum voltages for the second bit lines by adding first voltages generated according to currents that flow in the second bit lines when a first pattern is supplied to the word lines to difference voltages between a reference voltage generated according to a current that flows in the first bit line when a second pattern is supplied to the word lines and second voltages generated according to currents that flow in the second bit lines when a second pattern is supplied to the word lines; and a detection circuit that detects a second bit line that corresponds to a maximum value of the sum voltages.
    Type: Grant
    Filed: November 10, 2021
    Date of Patent: September 12, 2023
    Assignee: FUJITSU LIMITED
    Inventors: Hiroshi Nakao, Masayuki Hiromoto, Hisanao Akima, Teruo Ishihara, Takuji Yamamoto
  • Patent number: 11520857
    Abstract: A non-transitory computer-readable storage medium storing a program that causes a computer to execute a process, the process includes acquiring, based on a compression model that is acquired by learning processing on a set of data generated by using a combination of values of variables and that compresses dimensions of data, a point corresponding to data generated by using a predetermined combination of the values of variables within a compressed space; acquiring, based on the point corresponding to the data generated by using the predetermined combination, a target point within the space corresponding to a target value of a characteristic changing in accordance with the values of variables, and a regression model within the space for a predetermined variable of variables, a change amount of the predetermined variable; and changing the value of the predetermined variable included in the predetermined combination by using the change amount.
    Type: Grant
    Filed: February 26, 2020
    Date of Patent: December 6, 2022
    Assignee: FUJITSU LIMITED
    Inventor: Hisanao Akima
  • Publication number: 20220270683
    Abstract: A computer includes: a memristor array including memristors arranged at intersections between word lines and a first bit line in the memristor array and at intersections between the word lines and second bit lines in the memristor array; an adder circuit configured to obtain sum voltages for the second bit lines by adding first voltages generated according to currents that flow in the second bit lines when a first pattern is supplied to the word lines to difference voltages between a reference voltage generated according to a current that flows in the first bit line when a second pattern is supplied to the word lines and second voltages generated according to currents that flow in the second bit lines when a second pattern is supplied to the word lines; and a detection circuit that detects a second bit line that corresponds to a maximum value of the sum voltages.
    Type: Application
    Filed: November 10, 2021
    Publication date: August 25, 2022
    Applicant: FUJITSU LIMITED
    Inventors: Hiroshi Nakao, Masayuki Hiromoto, Hisanao Akima, TERUO ISHIHARA, Takuji YAMAMOTO
  • Patent number: 11144317
    Abstract: An AC parallelization circuit includes a transmitting circuit configured to transmit a stop signal to instruct a device for executing calculation in an iteration immediately preceding an iteration for which a concerned device is responsible to stop the calculation in loop-carried dependency calculation; and an estimating circuit configured to generate, as a result of executing the calculation in the preceding iteration, an estimated value to be provided to an arithmetic circuit when the transmitting circuit transmits the stop signal.
    Type: Grant
    Filed: August 20, 2020
    Date of Patent: October 12, 2021
    Assignee: FUJITSU LIMITED
    Inventor: Hisanao Akima
  • Publication number: 20210097402
    Abstract: A non-transitory computer-readable storage medium storing a program that causes a computer to execute a process, the process includes obtaining a machine learning model having learned characteristic amounts of a plurality of training data including an objective function; calculating similarities between the characteristic amounts of the plurality of training data by inputting the plurality of training data to the obtained machine learning model; specifying a data group having a high similarity with a desired objective function from the characteristic amounts of the plurality of training data based on distances of the calculated similarities; and acquiring an optimum solution for the desired objective function by using the specified data group.
    Type: Application
    Filed: September 22, 2020
    Publication date: April 1, 2021
    Applicant: FUJITSU LIMITED
    Inventors: Eiji Ohta, Hisanao Akima
  • Publication number: 20210072988
    Abstract: An AC parallelization circuit includes a transmitting circuit configured to transmit a stop signal to instruct a device for executing calculation in an iteration immediately preceding an iteration for which a concerned device is responsible to stop the calculation in loop-carried dependency calculation; and an estimating circuit configured to generate, as a result of executing the calculation in the preceding iteration, an estimated value to be provided to an arithmetic circuit when the transmitting circuit transmits the stop signal.
    Type: Application
    Filed: August 20, 2020
    Publication date: March 11, 2021
    Applicant: FUJITSU LIMITED
    Inventor: Hisanao Akima
  • Publication number: 20200285690
    Abstract: A non-transitory computer-readable storage medium storing a program that causes a computer to execute a process, the process includes acquiring, based on a compression model that is acquired by learning processing on a set of data generated by using a combination of values of variables and that compresses dimensions of data, a point corresponding to data generated by using a predetermined combination of the values of variables within a compressed space; acquiring, based on the point corresponding to the data generated by using the predetermined combination, a target point within the space corresponding to a target value of a characteristic changing in accordance with the values of variables, and a regression model within the space for a predetermined variable of variables, a change amount of the predetermined variable; and changing the value of the predetermined variable included in the predetermined combination by using the change amount.
    Type: Application
    Filed: February 26, 2020
    Publication date: September 10, 2020
    Applicant: FUJITSU LIMITED
    Inventor: Hisanao Akima
  • Patent number: 9484182
    Abstract: The present invention provides a method and apparatus for correcting an aberration in a charged-particle-beam device. The apparatus includes a charged-particle-beam source, a charged-particle optical system that irradiates a specimen with charged particles emitted from the charged-particle-beam source, an aberration corrector that corrects an aberration of the charged-particle optical system, a control unit that controls the charged-particle optical system and the aberration corrector, a through-focus imaging unit that obtains plural Ronchigrams in which a focal position of the charged-particle optical system is changed, and an aberration calculation unit that divides the obtained Ronchigram into plural local areas, and calculates the amount of the aberration based on line focuses detected in the local areas.
    Type: Grant
    Filed: August 7, 2013
    Date of Patent: November 1, 2016
    Assignee: Hitachi High-Technologies Corporation
    Inventors: Hisanao Akima, Takaho Yoshida
  • Patent number: 9312094
    Abstract: This charged particle beam device comprises: an electron beam source (1); a charged particle optical system that includes an object lens (9) and that irradiates a sample (10) with electrons emitted from the electron beam source (1) as an electron beam (2); an aberration corrector (6) that corrects aberrations in the charged particle optical system; and a control unit (24) that controls the components of the charged particle optical system and the aberration corrector (6). The charged particle beam device further comprises an automatic aberration-correcting device (17) that autonomously acquires, through leaning, optimum adjustment procedures in order to reduce the time required for correcting parasitic aberrations that arise in the aberration corrector (6).
    Type: Grant
    Filed: July 9, 2012
    Date of Patent: April 12, 2016
    Assignee: Hitachi High-Technologies Corporation
    Inventors: Hisanao Akima, Yoichi Hirayama
  • Patent number: 9224574
    Abstract: Beam scanning for obtaining a scanned image is performed by an aberration corrector, which is an aberration measured lens, and a scanning coil disposed above an objective lens, instead of a scanning coil ordinarily placed on the objective lens. Thus, distortion with an aberration of an aberration measured lens is scanned on the surface of a sample, and then a scanned image is formed from a scattered electron beam, a transmission electron beam, or a reflected/secondary electron beam that is generated by the scan, achieving a scanning aberration information pattern equivalent to a conventional Ronchigram. Such means is a feature of the present invention.
    Type: Grant
    Filed: November 4, 2011
    Date of Patent: December 29, 2015
    Assignee: HITACHI HIGH-TECHNOLOGIES CORPORATION
    Inventors: Takaho Yoshida, Hisanao Akima
  • Publication number: 20150235801
    Abstract: In aberration measurement, a focus or an inclination angle of a beam is changed to extract a characteristic amount from plural images of an electron microscope, so that an aberration coefficient indicating the size and direction of aberration is obtained. However, when the aberration is extremely large, the electron microscope images are greatly distorted, which causes difficulties in extraction of the feature amount.
    Type: Application
    Filed: August 7, 2013
    Publication date: August 20, 2015
    Inventors: Hisanao Akima, Takaho Yoshida
  • Patent number: 8866078
    Abstract: Disclosed is a scanning transmission type electron microscope provided with a scanning transmission electron microscope provided with an aberration corrector 805 for correcting the aberration of an electron-optical system that irradiates electron beams to a sample (808); a bright field image detector (813) for detecting electron beams that have transmitted through the sample; a camera (814); and an information processing apparatus (703) for processing signals detected by the detectors.
    Type: Grant
    Filed: May 16, 2011
    Date of Patent: October 21, 2014
    Assignee: Hitachi High-Technologies Corporation
    Inventors: Hisanao Akima, Takaho Yoshida
  • Publication number: 20140231666
    Abstract: This charged particle beam device comprises: an electron beam source (1); a charged particle optical system that includes an object lens (9) and that irradiates a sample (10) with electrons emitted from the electron beam source (1) as an electron beam (2); an aberration corrector (6) that corrects aberrations in the charged particle optical system; and a control unit (24) that controls the components of the charged particle optical system and the aberration corrector (6). The charged particle beam device further comprises an automatic aberration-correcting device (17) that autonomously acquires, through leaning, optimum adjustment procedures in order to reduce the time required for correcting parasitic aberrations that arise in the aberration corrector (6).
    Type: Application
    Filed: July 9, 2012
    Publication date: August 21, 2014
    Inventors: Hisanao Akima, Yoichi Hirayama
  • Publication number: 20130256531
    Abstract: Beam scanning for obtaining a scanned image is performed by an aberration corrector, which is an aberration measured lens, and a scanning coil disposed above an objective lens, instead of a scanning coil ordinarily placed on the objective lens. Thus, distortion with an aberration of an aberration measured lens is scanned on the surface of a sample, and then a scanned image is formed from a scattered electron beam, a transmission electron beam, or a reflected/secondary electron beam that is generated by the scan, achieving a scanning aberration information pattern equivalent to a conventional Ronchigram. Such means is a feature of the present invention.
    Type: Application
    Filed: November 4, 2011
    Publication date: October 3, 2013
    Applicant: HITACHI HIGH-TECHNOLOGIES CORPORATION
    Inventors: Takaho Yoshida, Hisanao Akima
  • Publication number: 20130099117
    Abstract: Disclosed is a scanning transmission type electron microscope provided with a scanning transmission electron microscope provided with an aberration corrector 805 for correcting the aberration of an electron-optical system that irradiates electron beams to a sample (808); a bright field image detector (813) for detecting electron beams that have transmitted through the sample; a camera (814); and an information processing apparatus (703) for processing signals detected by the detectors.
    Type: Application
    Filed: May 16, 2011
    Publication date: April 25, 2013
    Inventors: Hisanao Akima, Takaho Yoshida