Patents by Inventor Hisanori Ito
Hisanori Ito has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11952711Abstract: An object of the present invention is to provide a sewing thread treatment agent, and a sewing thread, each achieving low friction properties across a wide range of sewing speeds. As a solution, a sewing thread treatment agent is provided, which is characterized in that it contains a hydroxy-terminated polydimethylsiloxane (A), a nonionic surfactant (B), and at least one type of wax (C) selected from paraffin wax, oxidized paraffin wax, polyethylene wax, oxidized polyethylene wax, and carnauba wax.Type: GrantFiled: March 10, 2021Date of Patent: April 9, 2024Assignee: TAKEMOTO YUSHI KABUSHIKI KAISHAInventors: Jun Ito, Hisanori Murata, Shuya Hayakawa
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Patent number: 11926018Abstract: There is provided an apparatus for polishing, comprising a polishing table configured to support and rotate a polishing pad; a holder configured to hold an object and press the object against the polishing pad; a polishing solution supply device provided with a contact member and configured to supply a polishing solution to an opening in a bottom face of the contact member in a state that the contact member comes into contact with or is adjacent to the polishing pad, thereby spreading the polishing solution on the polishing pad, the polishing solution supply device causing at least part of used polishing solution returned by rotation of the polishing pad to be dammed up by the contact member and setting the contact member either in a direction of keeping the dammed up polishing solution on the polishing pad or in a direction of discharging the dammed up polishing solution, according to an angle of the polishing solution supply device with respect to a radial direction of the polishing pad; an arm linked withType: GrantFiled: May 7, 2021Date of Patent: March 12, 2024Assignee: EBARA CORPORATIONInventors: Masayoshi Ito, Hisanori Matsuo, Itsuki Kobata, Takuya Moriura
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Patent number: 10707623Abstract: In a vehicle capable of external charging, when the connection of an inlet of the vehicle with a charging cable is detected, an ECU transmits a locking command to a locking device. When it is determined that the locking device is in a locked state, the ECU permits external charging, and when it is determined that the locking device is not in the locked state, the ECU does not permit external charging. When the ECU does not permit external charging, the ECU displays information about manual locking by manual operation. When it is determined that the locking device is in the locked state after the ECU does not permit external charging, the ECU permits external charging.Type: GrantFiled: December 19, 2018Date of Patent: July 7, 2020Assignee: Toyota Jidosha Kabushiki KaishaInventors: Toru Ando, Hisanori Ito
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Publication number: 20190199037Abstract: In a vehicle capable of external charging, when the connection of an inlet of the vehicle with a charging cable is detected, an ECU transmits a locking command to a locking device. When it is determined that the locking device is in a locked state, the ECU permits external charging, and when it is determined that the locking device is not in the locked state, the ECU does not permit external charging. When the ECU does not permit external charging, the ECU displays information about manual locking by manual operation. When it is determined that the locking device is in the locked state after the ECU does not permit external charging, the ECU permits external charging.Type: ApplicationFiled: December 19, 2018Publication date: June 27, 2019Inventors: Toru Ando, Hisanori Ito
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Patent number: 10163740Abstract: A technique is provided that can prevent cracking of a protective film in the uppermost layer of a semiconductor device and improve the reliability of the semiconductor device. Bonding pads formed over a principal surface of a semiconductor chip are in a rectangular shape, and an opening is formed in a protective film over each bonding pad in such a manner that an overlapping width of the protective film in a wire bonding region of each bonding pad becomes wider than an overlapping width of the protective film in a probe region of each bonding pad.Type: GrantFiled: October 17, 2017Date of Patent: December 25, 2018Assignee: Renesas Electronics CorporationInventors: Bunji Yasumura, Fumio Tsuchiya, Hisanori Ito, Takuji Ide, Naoki Kawanabe, Masanao Sato
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Publication number: 20180040521Abstract: A technique is provided that can prevent cracking of a protective film in the uppermost layer of a semiconductor device and improve the reliability of the semiconductor device. Bonding pads formed over a principal surface of a semiconductor chip are in a rectangular shape, and an opening is formed in a protective film over each bonding pad in such a manner that an overlapping width of the protective film in a wire bonding region of each bonding pad becomes wider than an overlapping width of the protective film in a probe region of each bonding pad.Type: ApplicationFiled: October 17, 2017Publication date: February 8, 2018Inventors: Bunji YASUMURA, Fumio TSUCHIYA, Hisanori ITO, Takuji IDE, Naoki KAWANABE, Masanao SATO
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Patent number: 9824944Abstract: A technique is provided that can prevent cracking of a protective film in the uppermost layer of a semiconductor device and improve the reliability of the semiconductor device. Bonding pads formed over a principal surface of a semiconductor chip are in a rectangular shape, and an opening is formed in a protective film over each bonding pad in such a manner that an overlapping width of the protective film in a wire bonding region of each bonding pad becomes wider than an overlapping width of the protective film in a probe region of each bonding pad.Type: GrantFiled: September 29, 2016Date of Patent: November 21, 2017Assignee: Renesas Electronics CorporationInventors: Bunji Yasumura, Fumio Tsuchiya, Hisanori Ito, Takuji Ide, Naoki Kawanabe, Masanao Sato
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Publication number: 20170018470Abstract: A technique is provided that can prevent cracking of a protective film in the uppermost layer of a semiconductor device and improve the reliability of the semiconductor device. Bonding pads formed over a principal surface of a semiconductor chip are in a rectangular shape, and an opening is formed in a protective film over each bonding pad in such a manner that an overlapping width of the protective film in a wire bonding region of each bonding pad becomes wider than an overlapping width of the protective film in a probe region of each bonding pad.Type: ApplicationFiled: September 29, 2016Publication date: January 19, 2017Inventors: Bunji YASUMURA, Fumio TSUCHIYA, Hisanori ITO, Takuji IDE, Naoki KAWANABE, Masanao SATO
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Patent number: 9248838Abstract: A method and a system for making a one-time change to a primary departure schedule of a battery-electric vehicle for charging or pre-climate operations without affecting the future departure times of the primary departure schedule. The system can be a vehicle including an ECU, a memory, a battery, a charger connected to an external power source, a BMS, an HVAC and a display. The method may include receiving an alternate departure date and time different from the primary departure schedule, deactivating the charging or pre-climate operations based on the primary departure schedule and activating charging or pre-climate operations based on the alternate departure date and time. The method and system may also include receiving an immediate charge mode designation, deactivating the charging or pre-climate operations based on the primary schedule and immediately activating the charging operations without affecting the primary departure schedule.Type: GrantFiled: May 28, 2015Date of Patent: February 2, 2016Assignee: Toyota Motor Engineering & Manufacturing North America, Inc.Inventors: Hidetoshi Kusumi, Hisanori Ito
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Publication number: 20150258998Abstract: A method and a system for making a one-time change to a primary departure schedule of a battery-electric vehicle for charging or pre-climate operations without affecting the future departure times of the primary departure schedule. The system can be a vehicle including an ECU, a memory, a battery, a charger connected to an external power source, a BMS, an HVAC and a display. The method may include receiving an alternate departure date and time different from the primary departure schedule, deactivating the charging or pre-climate operations based on the primary departure schedule and activating charging or pre-climate operations based on the alternate departure date and time. The method and system may also include receiving an immediate charge mode designation, deactivating the charging or pre-climate operations based on the primary schedule and immediately activating the charging operations without affecting the primary departure schedule.Type: ApplicationFiled: May 28, 2015Publication date: September 17, 2015Inventors: Hidetoshi Kusumi, Hisanori Ito
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Patent number: 9048674Abstract: A charge notification system or user-selectable charge configuration for a vehicle. The system includes a battery, a charging connector, a charging cable, a charge location, a processor and a memory. The processor of the vehicle determines, based upon logic steps or parameters stored in the memory, when to send messages to a remote device based upon a charging characteristic of the vehicle. Different messages may be generated by the processor and transmitted for different charging characteristics of the vehicle. The charge notification system may also include an indicator local to the vehicle and configured to illuminate in varying configurations or at varying frequencies based upon a state of charge of the battery. A user may select between charging modes for the vehicle in order to extend a useable life of the battery by allowing the battery to charge up to predetermined or modifiable battery charge levels.Type: GrantFiled: September 29, 2012Date of Patent: June 2, 2015Assignee: Toyota Motor Engineering & Manufacturing North America, Inc.Inventors: Christopher Gregg, Hisanori Ito, Hidetoshi Kusumi
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Patent number: 9045042Abstract: A method and a system for making a one-time change to a primary departure schedule of a battery-electric vehicle for charging or pre-climate operations without affecting the future departure times of the primary departure schedule. The system can be a vehicle including an ECU, a memory, a battery, a charger connected to an external power source, a BMS, an HVAC and a display. The method may include receiving an alternate departure date and time different from the primary departure schedule, deactivating the charging or pre-climate operations based on the primary departure schedule and activating charging or pre-climate operations based on the alternate departure date and time. The method and system may also include receiving an immediate charge mode designation, deactivating the charging or pre-climate operations based on the primary schedule and immediately activating the charging operations without affecting the primary departure schedule.Type: GrantFiled: October 30, 2012Date of Patent: June 2, 2015Assignee: Toyota Motor Engineering & Manufacturing North America, Inc.Inventors: Hidetoshi Kusumi, Hisanori Ito
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Publication number: 20150137125Abstract: A technique is provided that can prevent cracking of a protective film in the uppermost layer of a semiconductor device and improve the reliability of the semiconductor device. Bonding pads formed over a principal surface of a semiconductor chip are in a rectangular shape, and an opening is formed in a protective film over each bonding pad in such a manner that an overlapping width of the protective film in a wire bonding region of each bonding pad becomes wider than an overlapping width of the protective film in a probe region of each bonding pad.Type: ApplicationFiled: January 5, 2015Publication date: May 21, 2015Inventors: Bunji Yasumura, Fumio Tsuchiya, Hisanori Ito, Takuji Ide, Naoki Kawanabe, Masanao Sato
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Patent number: 8946705Abstract: A technique is provided that can prevent cracking of a protective film in the uppermost layer of a semiconductor device and improve the reliability of the semiconductor device. Bonding pads formed over a principal surface of a semiconductor chip are in a rectangular shape, and an opening is formed in a protective film over each bonding pad in such a manner that an overlapping width of the protective film in a wire bonding region of each bonding pad becomes wider than an overlapping width of the protective film in a probe region of each bonding pad.Type: GrantFiled: May 12, 2010Date of Patent: February 3, 2015Assignee: Renesas Electronics CorporationInventors: Bunji Yasumura, Fumio Tsuchiya, Hisanori Ito, Takuji Ide, Naoki Kawanabe, Masanao Sato
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Publication number: 20130274972Abstract: A method and a system for making a one-time change to a primary departure schedule of a battery-electric vehicle for charging or pre-climate operations without affecting the future departure times of the primary departure schedule. The system can be a vehicle including an ECU, a memory, a battery, a charger connected to an external power source, a BMS, an HVAC and a display. The method may include receiving an alternate departure date and time different from the primary departure schedule, deactivating the charging or pre-climate operations based on the primary departure schedule and activating charging or pre-climate operations based on the alternate departure date and time. The method and system may also include receiving an immediate charge mode designation, deactivating the charging or pre-climate operations based on the primary schedule and immediately activating the charging operations without affecting the primary departure schedule.Type: ApplicationFiled: October 30, 2012Publication date: October 17, 2013Applicant: Toyota Motor Engineering & Manufacturing North America, Inc.Inventors: Hidetoshi Kusumi, Hisanori Ito
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Patent number: 8160662Abstract: A slide device includes a base, a slider provided at the base and slidable along an axis serving as a y-axis with respect to the base, a cam provided at the base and having a surface undulating in an x-axis direction orthogonal to the y-axis, a cam follower provided at the slider and capable of moving from a position corresponding to one end of the cam in the x-axis direction to a position corresponding to the other end, and an urging mechanism urging the cam follower towards the cam such that the cam follower slides around the cam in one direction in accompaniment with the sliding of the slider with respect to the base. Further, electronic equipment includes a front casing, a rear casing facing a rear surface of the front casing, and the slide device described above.Type: GrantFiled: March 17, 2009Date of Patent: April 17, 2012Assignee: Casio Hitachi Mobile Communications Co., Ltd.Inventor: Hisanori Ito
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Patent number: 8050066Abstract: The present invention aims to enhance the reliability of a semiconductor device having first through fourth capacitive elements. The first through fourth capacitive elements are disposed over a semiconductor substrate. A series circuit of the first and second capacitive elements and a series circuit of the third and fourth capacitive elements are coupled in parallel between first and second potentials. Lower electrodes of the first and third capacitive elements are respectively formed by a common conductor pattern and coupled to the first potential. Lower electrodes of the second and fourth capacitive elements are respectively formed by a conductor pattern of the same layer as the above conductor pattern and coupled to the second potential. Upper electrodes of the first and second capacitive elements are respectively formed by a common conductor pattern and brought to a floating potential.Type: GrantFiled: April 11, 2008Date of Patent: November 1, 2011Assignee: Renesas Electronics CorporationInventors: Keiichi Haraguchi, Toshikazu Matsui, Satoshi Kamei, Hisanori Ito
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Publication number: 20100295043Abstract: A technique is provided that can prevent cracking of a protective film in the uppermost layer of a semiconductor device and improve the reliability of the semiconductor device. Bonding pads formed over a principal surface of a semiconductor chip are in a rectangular shape, and an opening is formed in a protective film over each bonding pad in such a manner that an overlapping width of the protective film in a wire bonding region of each bonding pad becomes wider than an overlapping width of the protective film in a probe region of each bonding pad.Type: ApplicationFiled: May 12, 2010Publication date: November 25, 2010Inventors: Bunji YASUMURA, Fumio Tsuchiya, Hisanori Ito, Takuji Ide, Naoki Kawanabe, Masanao Sato
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Publication number: 20090247248Abstract: A slide device includes a base, a slider provided at the base and slidable along an axis serving as a y-axis with respect to the base, a cam provided at the base and having a surface undulating in an x-axis direction orthogonal to the y-axis, a cam follower provided at the slider and capable of moving from a position corresponding to one end of the cam in the x-axis direction to a position corresponding to the other end, and an urging mechanism urging the cam follower towards the cam such that the cam follower slides around the cam in one direction in accompaniment with the sliding of the slider with respect to the base. Further, electronic equipment includes a front casing, a rear casing facing a rear surface of the front casing, and the slide device described above.Type: ApplicationFiled: March 17, 2009Publication date: October 1, 2009Applicant: Casio Hitachi Mobile Communications Co., Ltd.Inventor: Hisanori ITO
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Publication number: 20090026546Abstract: To provide a technique capable of achieving high integration of semiconductor devices. A standard cell is provided in an n-type well, and includes a p+-type diffusion layer and n+-type diffusion layer covered with a metal silicide film. The p+-type diffusion layer constitutes a source/drain of an MIS transistor, and the n+-type diffusion layer constitutes a tap. The p+-type diffusion layer is electrically coupled to a wiring layer via a contact, and the n+-type diffusion layer is electrically coupled to a wiring layer via a contact. Moreover, the p+-type diffusion layer is in contact with the n+-type diffusion layer. A power supply potential supplied to the source node of the MIS transistor is provided using two layers, i.e., the diffusion layer and the wiring layer.Type: ApplicationFiled: July 24, 2008Publication date: January 29, 2009Inventors: Masaki SHIMADA, Toshio YAMADA, Hisanori ITO, Katsuhiro KOGA