Abstract: In an image data processing apparatus such as an X-ray imaging system, a simple address calculation is achieved. The image data processing apparatus includes: a first storage unit for storing image data; a calculation unit for performing a predetermined calculation with respect to the image data read out from the first storage unit, thereby to output calculated image data and for producing first address data about the calculated image data; and a first address generating unit for generating second address data suitable for accessing the first storage unit based upon the first address data outputted from the calculation unit.

Abstract: An X-ray CT scanner apparatus comprises a rotatable support and a mounting support. The rotatable support holds an X-ray generating source and an X-ray detector in opposition to each other, and is rotated around a patient placed between the X-ray generating source and the X-ray detector. The mounting supporting supports the rotatable support in a rotatable manner. The X-ray CT scanner further comprises an X-ray data collecting unit attached to the rotatable support, a transmission member attached to both the rotatable support and mounting support, and an image-reconstructing circuit. The X-ray data collecting unit includes a data collecting circuit for collecting the X-ray projection data obtained by the X-ray detector when an X-ray CT scan is performed with respect to the patient, and also a buffer for storing the collected X-ray projection data. The transmission member transmits the X-ray projection data from the buffer to the mounting support during a rest time of the X-ray CT scan.

Abstract: An error checking apparatus includes first and second switching circuits arranged at input and output ports of a data processing circuit for processing data constituted by a plurality of parallel bits to be transferred through a plurality of transmission lines. The first and second switching circuits are switched so as to bit-shift the input/output connections in a normal mode and a test mode. An error detection control circuit is arranged to decide an error position and a cause of an error in accordance with contents of data obtained at the circuit output port before and after switching.

Abstract: An apparatus for processing image data of a computerized tomography system having image data acquisition and main storage devices is provided. The image processing apparatus includes an image processor memory for storing image data and a plurality of operation means having processing apparatus for sequentially performing processing operations on the image data. The apparatus further includes a process controller for providing the image processor memory and the operation means with control data specifying the processing operations to be sequentially performed by the plurality of operation means and for generating sequence selection data. The apparatus also includes a sequencer means for selecting the sequence in which the processing operations are to be performed in accordance with the sequence selection data.

Abstract: A system for sequentially providing external circuit data for an external circuit comprising: a memory having a plurality of memory locations identified by addresses, each memory location containing an instruction comprising external circuit data and memory location data, the memory further comprising an address input terminal for currently accessing one of the memory locations in response to receipt of the address for that memory location at the address input terminal; a sequencer, coupled to the memory to receive memory location data from the currently addressed one of the memory locations, for selecting the address of another of the memory locations in response to the next memory location data; a first register, coupled between the sequencer and the address input terminal of the memory to receive the address of the other of the memory locations from the sequencer for storing the address selected by the sequencer to make the address available at the address input terminal of the memory to access the other o