Abstract: A memory system is improved such that a plurality of data are simultaneously read-out from a memory array and at least two data are selected out of the read-out data by a single address. Another data is simultaneously read out from another memory block by the same address and applied to at least two arithmetic devices to which the former at least two data are respectively applied. Further, means for writing data to the memory array in parallel with the read-out operation is provided, so that the data computation can be executed continuously without waiting until the data writing operation is terminated.