Patents by Inventor Hisashi Nomura

Hisashi Nomura has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230294145
    Abstract: A gas cleaning method includes: (a) removing a first metal element as one of contaminants from a process chamber by supplying a chlorine-containing gas into the process chamber without supplying an oxygen-containing gas; and (b) removing a second metal element as another one of the contaminants from the process chamber by supplying the oxygen-containing gas into the process chamber, wherein (b) is performed after (a).
    Type: Application
    Filed: February 1, 2023
    Publication date: September 21, 2023
    Applicant: Kokusai Electric Corporation
    Inventors: Takahiro KOBAYASHI, Iwao NAKAMURA, Toru HARADA, Hisashi NOMURA, Sadayoshi HORII
  • Patent number: 9023429
    Abstract: A method of manufacturing a semiconductor device including: mounting a substrate on a substrate mounting member that is disposed in a reaction container; heating the substrate at a predetermined processing temperature and supplying a first gas and a second gas to the substrate to process the substrate; stopping supply of the first gas and the second gas, and supplying an inert gas into the reaction container; and unloading the substrate to outside the reaction container.
    Type: Grant
    Filed: September 25, 2012
    Date of Patent: May 5, 2015
    Assignee: Hitachi Kokusai Electric Inc.
    Inventors: Yuichiro Takeshima, Osamu Kasahara, Kazuyuki Toyoda, Junichi Tanabe, Katsuhiko Yamamoto, Hisashi Nomura
  • Publication number: 20120305026
    Abstract: A film-forming method and a substrate processing apparatus are provided, which are capable of improving productivity of an epitaxial film of GaN by increasing the number of substrates to be processed at one time. The substrate processing apparatus for processing a substrate including an epitaxial film includes: a processing chamber configured to process the substrate, a gas supply unit configured supply a source gas for forming the epitaxial film and a cleaning gas into the processing chamber, and a control unit configured to control at least an inside temperature and an inside pressure of the processing chamber, wherein the control unit controls the gas supply unit to supply the cleaning gas into the processing chamber when the inside temperature and the inside pressure of the processing chamber reach a predetermined temperature and a predetermined pressure, respectively.
    Type: Application
    Filed: May 29, 2012
    Publication date: December 6, 2012
    Applicant: HITACHI KOKUSAI ELECTRIC INC.
    Inventors: Hisashi Nomura, Yohei Noguchi, Shinichi Noguchi, Tomoshi Taniyama
  • Patent number: 7943115
    Abstract: This invention relates to a 4 group metal oxide and to a method for preparation thereof and the 4 group metal oxide prepared by adding a particle growth inhibiter to a hydrosol a hydrogel or a dried product of a hydrous 4 group metal oxide represented by MO(2-x)(OH)2x (wherein M denotes a 4 group metal and x is a number greater than 0.1 or x>0.1) followed by drying and calcining has a specific surface area of 80 m2/g or more, a pore volume of 0.2 ml/g or more and a pore sharpness degree of 50% or more and excellent heat stability and is useful for a catalyst or a catalyst carrier in which a catalyst metal is dispersed to a high degree.
    Type: Grant
    Filed: January 15, 2002
    Date of Patent: May 17, 2011
    Assignee: Chiyoda Corporation
    Inventors: Shinichi Inoue, Hidehiko Kudou, Akihiro Mutou, Tateo Ono, Toshiji Makabe, Toru Takatsuka, Hisashi Nomura
  • Patent number: 7691781
    Abstract: This invention provides layered porous titanium oxide comprising an inorganic oxide as a core and titanium oxide deposited on the surface of the inorganic oxide, wherein the titanium localization index B/A represented by the ratio of the proportion of titanium (Ti) to the sum of the constituent metal (M) of the inorganic oxide and titanium (Ti) determined by X-ray photoelectron spectroscopy (XPS) [B=Ti XPS/(Ti XPS+M XPS)] to the bulk mixing molar ratio of titanium (Ti) to the sum of the constituent metal (M) of the inorganic oxide and titanium (Ti) [A=Ti/(Ti+M)] is 1.6 or more and the titanium oxide is deposited on the surface of the inorganic oxide so as to be chemically and/or microscopically united to the inorganic oxide and also provides a process for producing the same and a catalyst comprising the same. The layered porous titanium oxide of this invention has a regulated pore structure, a large specific surface area, and excellent mechanical strength and is useful as a catalyst or a catalyst carrier.
    Type: Grant
    Filed: December 25, 2003
    Date of Patent: April 6, 2010
    Assignee: Chiyoda Corporation
    Inventors: Shinichi Inoue, Akihiro Mutou, Yukitaka Wada, Hidehiko Kudou, Tateo Ono, Hisashi Nomura
  • Publication number: 20070140952
    Abstract: This invention provides layered porous titanium oxide comprising an inorganic oxide as a core and titanium oxide deposited on the surface of the inorganic oxide, wherein the titanium localization index B/A represented by the ratio of the proportion of titanium (Ti) to the sum of the constituent metal (M) of the inorganic oxide and titanium (Ti) determined by X-ray photoelectron spectroscopy (XPS) [B=TiXPS/(TiXPS+MXPS)] to the bulk mixing molar ratio of titanium (Ti) to the sum of the constituent metal (M) of the inorganic oxide and titanium (Ti) [A=Ti/(Ti+M)] is 1.6 or more and the titanium oxide is deposited on the surface of the inorganic oxide so as to be chemically and/or microscopically united to the inorganic oxide and also provides a process for producing the same and a catalyst comprising the same. The layered porous titanium oxide of this invention has a regulated pore structure, a large specific surface area, and excellent mechanical strength and is useful as a catalyst or a catalyst carrier.
    Type: Application
    Filed: December 25, 2003
    Publication date: June 21, 2007
    Inventors: Shinichi Inoue, Akihiro Mutou, Yukitaka Wada, Hidehiko Kudou, Tateo Ono, Hisashi Nomura
  • Publication number: 20040238410
    Abstract: This invention relates to a 4 group metal oxide and to a method for preparation thereof and the 4 group metal oxide prepared by adding a particle growth inhibiter to a hydrosol a hydrogel or a dried product of a hydrous 4 group metal oxide represented by MO(2-x)(OH)2x (wherein M denotes a 4 group metal and x is a number greater than 0.1 or x>0.1) followed by drying and calcining has a specific surface area of 80 m2/g or more, a pore volume of 0.2 ml/g or more and a pore sharpness degree of 50% or more and excellent heat stability and is useful for a catalyst or a catalyst carrier in which a catalyst metal is dispersed to a high degree.
    Type: Application
    Filed: January 26, 2004
    Publication date: December 2, 2004
    Inventors: Shinichi Inoue, Akihiro Mutou, Tateo Ono, Toshiji Makabe, Toru Takatsuka, Hisashi Nomura
  • Patent number: 6821871
    Abstract: It is an object of the present invention to make it easy to diffuse phosphorus into a silicon film and allow the phosphorus diffusion concentration to be easily controlled by varying the timing at which the dopant gas is allowed to flow. A silicon wafer 10 on whose surface an amorphous silicon film 12 has been formed is placed in a diffusion furnace. After this, phosphine (PH3) or a mixed gas containing phosphine is allowed to begin flowing over the wafer 15 and the phosphorus is diffused into the silicon film 12 before the amorphous silicon film 12 crystallizes and changes into a polysilicon film.
    Type: Grant
    Filed: June 13, 2001
    Date of Patent: November 23, 2004
    Assignees: Hitachi Kokusai Electric Inc., Hitachi, Ltd.
    Inventors: Hisashi Nomura, Yushin Takasawa, Hajime Karasawa, Yoshinori Imai, Tadanori Yoshida, Kenichi Yamaguchi
  • Patent number: 6787481
    Abstract: A method for manufacturing a semiconductor device can efficiently form on a substrate an amorphous thin film containing small amounts of impurities without needs for a rapid annealing treatment and a frequent cleaning process. A method for manufacturing a semiconductor device comprises a film-forming step and a film-modifying step. In the film-forming step, a film formation gas from a film formation raw material supply unit 9 is supplied into a reaction chamber 1 through a shower head 6 to form an amorphous thin film including a hafnium oxide film (HfO2 film) on a substrate 4 which is rotating. In the film-modifying step, a radical generated in a reactant activation unit 11 is supplied through the same shower head 6 as used for supplying the film formation gas, so as to remove a specific element which is an impurity in the film formed in the film-forming step.
    Type: Grant
    Filed: February 28, 2003
    Date of Patent: September 7, 2004
    Assignee: Hitachi Kokusai Electric Inc.
    Inventors: Masayuki Asai, Hisashi Nomura, Sadayoshi Horii
  • Publication number: 20040009678
    Abstract: A method for manufacturing a semiconductor device can efficiently form on a substrate an amorphous thin film containing small amounts of impurities without needs for a rapid annealing treatment and a frequent cleaning process. A method for manufacturing a semiconductor device comprises a film-forming step and a film-modifying step. In the film-forming step, a film formation gas from a film formation raw material supply unit 9 is supplied into a reaction chamber 1 through a shower head 6 to form an amorphous thin film including a hafnium oxide film (HfO2 film) on a substrate 4 which is rotating. In the film-modifying step, a radical generated in a reactant activation unit 11 is supplied through the same shower head 6 as used for supplying the film formation gas, so as to remove a specific element which is an impurity in the film formed in the film-forming step.
    Type: Application
    Filed: February 28, 2003
    Publication date: January 15, 2004
    Applicant: Hitachi Kokusai Electric Inc.
    Inventors: Masayuki Asai, Hisashi Nomura, Sadayoshi Horii
  • Publication number: 20020016051
    Abstract: It is an object of the present invention to make it easy to diffuse phosphorus into a silicon film and allow the phosphorus diffusion concentration to be easily controlled by varying the timing at which the dopant gas is allowed to flow. A silicon wafer 10 on whose surface an amorphous silicon film 12 has been formed is placed in a diffusion furnace. After this, phosphine (PH3) or a mixed gas containing phosphine is allowed to begin flowing over the wafer 15 and the phosphorus is diffused into the silicon film 12 before the amorphous silicon film 12 crystallizes and changes into a polysilicon film.
    Type: Application
    Filed: June 13, 2001
    Publication date: February 7, 2002
    Applicant: HITACHI KOKUSAI ELECTRIC INC.
    Inventors: Hisashi Nomura, Yushin Takasawa, Hajime Karasawa, Yoshinori Imai, Tadanori Yoshida, Kenichi Yamaguchi
  • Patent number: 5960159
    Abstract: A substrate processing apparatus includes a substrate supporting pedestal having an upper substrate supporting pedestal and a lower substrate supporting pedestal which are vertically stacked, an upper resistance heater provided above the upper substrate supporting pedestal so as to be opposite to the upper substrate supporting pedestal, and a lower resistance heater provided under the lower substrate supporting pedestal so as to be opposite to the lower substrate supporting pedestal. Each of the upper substrate supporting pedestal and the lower substrate supporting pedestal is capable of mounting a substrate or substrates in a substantially horizontal position, and the lower substrate supporting pedestal including an opening which exposes the substrate in its entirety or openings which expose the substrates in their entireties as viewed from under the lower substrate supporting pedestal.
    Type: Grant
    Filed: October 14, 1997
    Date of Patent: September 28, 1999
    Assignee: Kokusai Electric Co., Ltd.
    Inventors: Fumihide Ikeda, Junichi Machida, Masayuki Tomita, Yasuhiro Inokuchi, Kazuhiro Shimeno, Hisashi Nomura, Tetsuaki Inada